GOA Unit Buffering Module Noise Reduction

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Solution Overview

Problem

Conventional gate driver on array (GOA) units suffer from noise susceptibility at the pull-up node due to parasitic capacitance in the transistor of the pull-up module, affecting the stability of voltages at the pull-up node and output signal terminal.

Innovation Solution

The proposed GOA unit incorporates a buffering module, a pull-up module, a pull-down module, a retaining module, a charging module, and a discharging module, with specific transistor configurations and a diode to control voltage levels and reduce noise by writing voltages into the pull-down node and output signal terminal, thereby lowering the voltages at the pull-up node and output signal terminal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If GOA technology is used to integrate gate driving ICs on the array substrate, then fabrication cost and power consumption are reduced, but parasitic capacitance in the transistor causes the pull-up node to be susceptible to noise

Engineering Contradiction:
Improvepower consumptionVSAvoidnoise susceptibility at pull-up node
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

A buffering module is introduced as an intermediary between the input signal terminal and the pull-up node. This buffering module includes a transistor whose gate is connected to the input signal terminal and whose source and drain are connected to reference voltage terminals, creating a stable intermediate stage that isolates the pull-up node from direct signal variations and reduces noise susceptibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the voltage parameters at the pull-up node by introducing a discharging module that can actively discharge the node to a reference voltage level. By controlling the discharge timing and voltage level, the system maintains the pull-up node voltage within a stable range, reducing the impact of parasitic capacitance and noise.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If parasitic capacitance in the pull-up module transistor is present, then the pull-up node becomes susceptible to noise, but adding more modules to reduce noise increases device complexity

Engineering Contradiction:
Improvenoise susceptibility at pull-up nodeVSAvoidcircuit module complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The buffering module serves multiple functions: it acts as a voltage buffer, a noise filter, and a signal isolation stage. The discharging module also performs dual functions by actively discharging the pull-up node and maintaining voltage stability. This multi-functionality reduces the need for additional dedicated noise reduction circuits, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Object-affected harmful factors

If voltage levels at the pull-up node are not controlled, then noise susceptibility increases, but active voltage control requires additional circuit elements

Engineering Contradiction:
Improvenoise susceptibility at pull-up nodeVSAvoidcircuit element quantity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The buffering module and discharging module are integrated into the existing GOA unit structure, sharing common terminals and coordinating their operations. The buffering module's transistor and the discharging module's transistor work in conjunction to control the pull-up node voltage, combining multiple control functions into a unified circuit architecture that minimizes the total number of discrete elements.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10089948B2Gate driver on array unit, related gate driver on array circuit, display device containing the same, and method for driving the same
Publication Date: 2018.10.02 BOE TECHNOLOGY GROUP CO LTD
  • US10089948B2 patent drawing
  • US10089948B2 patent drawing
  • US10089948B2 patent drawing

AI summary

The present application discloses a gate driver on array (GOA) unit, including: a buffering module, a pull-up module, a pull-down module, a retaining module, a charging module, and a discharging module, a pull-up node being coupled to the buffering module, the discharging module, the pull-up module, and the charging module, and a pull-down node being coupled to the discharging module and the retaining module. The buffering module, being coupled to an input signal terminal and a pull-up node and controlled by a voltage of the input signal terminal, is configured to output the voltage of the input signal terminal into the pull-up node. The pull-up module, being coupled to a first clock signal terminal, the pull-up node, and an output signal terminal and controlled by a voltage of the pull-up node, is configured to output a voltage of the first clock signal terminal into the output signal terminal.