GOA Circuit Clock Signal Design for Narrow Bezel Panels

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Solution Overview

Problem

The existing GOA circuit in liquid crystal panels requires multiple signal lines, which occupies significant space and is inefficient, making it challenging for the design of narrow bezel panels.

Innovation Solution

A new set of clock signals is introduced to the GOA circuit, where the first and second clock signals have the same long period but with different timing phases, allowing them to alternately control the pull-up and pull-down maintaining circuits, reducing the number of signal lines needed and optimizing space usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple signal lines are used in the GOA circuit to control pull-up and pull-down maintaining circuits, then the circuit can maintain stable operation, but the space occupation increases significantly

Engineering Contradiction:
Improvestability of scan driving signalVSAvoidspace occupation of signal lines
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The clock signal line is designed to perform multiple functions: it serves as the clock signal for the pull-up maintaining circuit and simultaneously as the control signal for the pull-down maintaining circuit. This multi-functional design allows one signal line to replace what would traditionally require multiple separate signal lines, thereby reducing space occupation while maintaining circuit stability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the clock signal function and the pull-down control signal function into a single clock signal line. By combining these functions, the number of signal lines is reduced, which directly addresses the space occupation problem while ensuring both maintaining circuits operate stably

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If traditional control signals are used for pull-down maintaining circuit, then the circuit operation is simple, but the signal line efficiency is low

Engineering Contradiction:
Improvecircuit operation simplicityVSAvoidsignal line configuration complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The clock signal is designed to serve dual purposes: providing timing signals to the pull-up maintaining circuit and control signals to the pull-down maintaining circuit. This universal usage of the clock signal line simplifies the overall signal configuration by eliminating the need for separate control signal lines

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10825412B2Liquid crystal panel including GOA circuit and driving method thereof
Publication Date: 2020.11.03 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US10825412B2 patent drawing
  • US10825412B2 patent drawing
  • US10825412B2 patent drawing

AI summary

There is provided a liquid crystal panel including a GOA circuit and a driving method thereof. The GOA circuit includes a plurality of cascaded single-stage GOA circuit units, and each single-stage GOA circuit unit includes a first pull-down maintaining circuit unit and a second pull-down maintaining circuit unit. A first control terminal of the first pull-down maintaining circuit unit is input with a first clock signal, a second control terminal of the second pull-down maintaining circuit unit is input with a second clock signal, and the pull-down circuit unit is input with a scan driving signal of a GOA circuit unit of next second stage. The first clock signal and the second clock signal are input alternately to the pull-up circuit units and the pull-down circuit units in GOA circuit units of adjacent stages. The first clock signal and the second clock signal have the same long period.