GOA Circuit DC Pull-Up for LCD Scan Signal Delay
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Solution Overview
Problem
The existing GOA circuit in liquid crystal display (LCD) devices experiences significant signal delay due to clock signal delays, affecting stage-transfer efficiency and scan drive signal quality, which can be mitigated but at the cost of increasing border width.
Innovation Solution
A GOA circuit design that includes multiple cascade-connected GOA units with specific pull-up and pull-down control circuits, utilizing a DC high voltage signal as the input source for the pull-up circuit and only a clock signal for stage-transfer, improving stage-transfer efficiency and scan drive signal quality without increasing border width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock signal width is widened to relieve signal delay, then the stage-transfer efficiency is improved, but the border width of the LCD device increases
Solution Approach 1:
The patent changes the voltage parameter of the pull-up circuit from using clock signal to using DC high voltage signal. This parameter change eliminates the signal delay issue while maintaining compact border width, as DC voltage does not suffer from the same timing delays as clock signals.
2Device complexity
If the clock signal is used as the output source of scan drive signal, then the GOA circuit can be simplified, but the signal delay affects the output quality and charging ratio
Solution Approach 1:
The patent introduces a DC high voltage signal as an intermediary power source for the pull-up circuit. This intermediary voltage source acts as a mediator that provides stable power without the timing delays inherent in clock signals, thereby improving signal quality while maintaining circuit functionality.
Solution Approach 2:
The patent changes the voltage parameter of the pull-up circuit from using clock signal to using DC high voltage signal. This parameter change eliminates the signal delay issue while maintaining compact border width, as DC voltage does not suffer from the same timing delays as clock signals.
3Productivity
If the pull-down speed is increased to improve scan drive signal response, then the charging ratio increases, but the circuit complexity increases
Solution Approach 1:
The patent segments the pull-down function into two separate circuits: a first pull-down circuit for pulling down the pull-up control signal, and a second pull-down circuit for pulling down the scan drive signal. This segmentation allows each circuit to be optimized for its specific function, achieving fast pull-down speed without excessive overall complexity.
Solution Approach 2:
The patent implements multiple pull-down circuits (first pull-down circuit, second pull-down circuit, and main pull-down circuit) that provide redundant pull-down paths. This excessive action ensures fast and reliable pull-down operation, guaranteeing high charging ratio even under varying operating conditions.
Data Source
AI summary
The invention provides a GOA circuit and a liquid crystal display device each including multiple cascade connected GOA units. An nth-stage GOA unit is for charging an nth-stage horizontal scan line in a display area. The nth-stage GOA unit includes a pull-up control circuit, a pull-up circuit, a transfer circuit, a first pull-down control circuit, a first pull-down circuit, a second pull-down control circuit, a second pull-down circuit and a main pull-down circuit, where n is a positive integer. The invention can improve the stage-transfer efficiency of GOA circuit, improve the output quality of scan drive signal so as to increase charging ratio of LCD tubes and also can accelerate the pull-down speed of scan drive signal.