GOA Circuit Layout for Near Bezel-Free Display Panels

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Solution Overview

Problem

Current GOA circuit designs occupy significant layout space on display panels, limiting the ability to further reduce bezel sizes, especially in applications requiring ultra-narrow bezels.

Innovation Solution

The design of a GOA circuit within the display area of an array substrate, where the GOA circuit is modularly designed and staggered between pixel units in adjacent rows, reducing the layout space occupied and improving design efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If GOA circuits are placed on both sides of the display panels, then the bonding processes in the row scan line direction are eliminated and integration is improved, but the layout space occupied increases and prevents further bezel size reduction

Engineering Contradiction:
Improveintegration of display panelsVSAvoidlayout space occupied by GOA circuits
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent transitions from placing GOA circuits on the side edges of the display panel to embedding them within the display area, utilizing the vertical dimension and inter-pixel spacing. This dimensional repositioning allows the GOA circuits to be integrated without increasing the horizontal bezel width, thereby resolving the contradiction between manufacturing integration and layout space occupation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The GOA circuits are nested within the display area by positioning them in the gaps between adjacent pixel units. This nesting approach allows the driving circuits to be housed within the existing display structure without requiring additional external space, thus maintaining compact bezel dimensions while achieving circuit integration.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If GOA circuits are designed to occupy minimal layout space, then bezel sizes can be reduced, but the complexity of circuit design and layout increases

Engineering Contradiction:
Improvebezel sizeVSAvoidcircuit layout complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The display area is segmented into pixel units with intervening gaps, and the GOA circuits are assigned to specific segments (gaps between pixels). This segmentation allows the circuits to be distributed throughout the display area rather than concentrated in one location, reducing the required bezel space while managing design complexity through modular placement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the display area are assigned different functions: pixel units for display and gaps between pixels for GOA circuits. This local differentiation optimizes space utilization by placing circuits only where needed, minimizing overall layout space requirements while maintaining design organization and reducing complexity through functional zoning.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4145216B1Array substrate and display panel
Publication Date: 2025.06.11 WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
  • EP4145216B1 patent drawingFigure 1
  • EP4145216B1 patent drawingFigure 2
  • EP4145216B1 patent drawingFigure 3

AI summary

An array substrate and a display panel are disclosed; at least one GOA circuit is provided in a pixel area of a same row, all GOA circuits of the same row are connected to a same scan line, and each GOA circuit of the same row is connected to a driving IC through a corresponding driving signal line. By setting the GOA circuit in a display area, a near bezel-free display panel design can be realized. Meanwhile, the GOA circuit is modularly designed to form an independent layout model, which improves design efficiency.