GOA Circuit Area Layout for Display Screen Ratio
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Solution Overview
Problem
Current Gate driver on array (GOA) technology faces challenges in further reducing the non-display area of display devices due to electrical stability and performance requirements, limiting the shrinkage of the GOA circuit area and thus hindering the increase in screen ratio.
Innovation Solution
The proposed array substrate design includes a GOA driving circuit area with a GOA signal area positioned above it, featuring a specific layer structure that includes a substrate, buffer layer, active layer, gate insulating layer, metal layers, and an organic layer, with via holes connecting the signal trace to the thin film transistor layer, allowing for reduced space occupation and preventing signal interference by using different materials for the metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the GOA circuit area is reduced to increase screen ratio, then the screen ratio is improved, but the electrical stability and performance of the GOA circuit deteriorates
Solution Approach 1:
The patent transitions the GOA signal area from a horizontal arrangement (adjacent to driving circuit area) to a vertical arrangement (above the driving circuit area). This dimensional change allows the signal area to be positioned over the driving circuit area in the vertical direction, reducing the horizontal space occupied by the GOA circuit while maintaining electrical connection through via holes that penetrate through insulating layers.
Solution Approach 2:
The GOA signal area is nested above the GOA driving circuit area, with the signal trace and touch metal layer positioned vertically over the driving circuit components. This nesting arrangement allows the signal area to occupy vertical space rather than horizontal space, effectively reducing the overall GOA circuit footprint while maintaining functional separation.
2Device complexity
If the GOA signal area and driving circuit area are disposed adjacent to each other, then the electrical connection is simplified, but the space occupation is increased
Solution Approach 1:
The patent moves the GOA signal area from a horizontal adjacent position to a vertical position above the driving circuit area. This dimensional transition reduces space occupation by utilizing the vertical dimension for signal routing, while electrical connection is maintained through via holes that provide vertical pathways through the insulating layers.
Solution Approach 2:
Via holes serve as intermediary structures that enable electrical connection between the GOA signal area (positioned above) and the driving circuit area (positioned below). These via holes penetrate through the insulating layers, acting as conductive pathways that maintain electrical connectivity despite the vertical separation and reduced horizontal spacing.
3Ease of manufacture
If the same material is used for metal layers, then the manufacturing process is simplified, but signal interference between metal layers occurs
Solution Approach 1:
The patent applies different material properties to different metal layers to prevent signal interference. Specifically, the first metal layer and second metal layer use different materials with different electrical characteristics, creating local quality differences that reduce electromagnetic coupling and signal interference between adjacent layers while maintaining overall manufacturing feasibility.
Solution Approach 2:
The patent employs composite material structure by using different materials for the first metal layer and second metal layer. This composite approach combines materials with complementary properties to achieve both electrical performance (reduced interference) and manufacturing considerations, rather than using a single uniform material throughout.
Data Source
AI summary
An array substrate and a method of manufacturing the same are provided. By setting a gate driver on array (GOA) signal area above a GOA driving circuit area, space occupied by a GOA circuit area is reduced, thereby reducing a frame of a display device, and further increasing a screen ratio of the display device.