GOA Circuit Gate Voltage Control via Dual Clock Signals
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Solution Overview
Problem
Existing GOA circuits for liquid crystal displays face challenges in precisely controlling the voltage of the gate Q(n) of thin film transistors affecting the horizontal scan line, leading to instability in the charging signal output.
Innovation Solution
A GOA circuit design utilizing a combination of low frequency and high frequency clock signals, along with a specific configuration of thin film transistors, to precisely control the voltage of the gate Q(n) during charging and non-charging periods, ensuring stable output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional GOA circuit uses a single clock signal frequency, then the circuit structure is simple, but the voltage control precision of gate Q(n) is insufficient leading to unstable charging signal output
Solution Approach 1:
The patent divides the single clock signal into two different frequency clock signals (first clock signal and second clock signal). This segmentation allows independent control of charging and non-charging periods, improving voltage control precision of gate Q(n) without requiring complete redesign of the circuit architecture
Solution Approach 2:
The patent introduces dynamic frequency switching by using two different frequency clock signals instead of a fixed frequency signal. The circuit dynamically selects which clock signal to use based on whether the current period is a charging period or non-charging period, enabling precise voltage control while maintaining circuit stability
2Duration of action of stationary object
If the hold time of the scan circuit is extended to cover the remaining frame time, then the display continuity is improved, but the stability requirement for the thin film transistor increases significantly
Solution Approach 1:
The patent implements periodic switching between charging and non-charging periods using alternating clock signals. This periodic action allows the thin film transistor to be periodically turned off during non-charging periods, reducing the cumulative stress and stability requirements compared to continuous holding
Solution Approach 2:
The circuit dynamically adjusts the state of the thin film transistor based on the clock signal phase. During non-charging periods, the transistor is turned off to reduce stability requirements, while during charging periods it is activated. This dynamic state adjustment allows extended hold time without proportionally increasing stability demands
Data Source
AI summary
The present invention relates to a GOA circuit for liquid crystal displaying and a display device. The GOA circuit includes a plurality of cascaded GOA units and the nth-stage GOA unit includes a pull-up part (100), a key pull-down part (200), a pull-down holding part (300), a pull-up control part (400), and a boost capacitor (Cb). In operation, a nth-stage clock signal (CK(n)) and first and second clock signals (LC1 and LC2) are inputted. The frequencies of the first clock signal (LC1) and the second clock signal (LC2) are lower than the nth clock signal (CK(n)). The first clock signal (LC1) charging a first circuit point (P) and the second clock signal (LC2) charging a second circuit point (K) are alternately carried out. The present invention also provides a corresponding display device. The GOA circuit of the present invention precisely controls the voltage of the gate Q(n) that affects charging of a horizontal scan line by means of the low frequency clock signal and the high frequency clock signal, so as to ensure a stable output of the GOA charging signal.