GOA Circuit Layout for Non-Overlapping ESD-Safe Signal Routing
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Solution Overview
Problem
In Gate on Array (GOA) technology, the lengthening of signal lines during the production of larger display products leads to increased susceptibility to Electro-Static Discharge (ESD), particularly in oxide TFT products, causing signal line overlaps and resulting in short circuits and reduced anti-static performance.
Innovation Solution
The GOA circuit design includes non-overlapping STV and non-STV signal lines, with an electro-static discharge electrode and an auxiliary signal line to prevent overlaps and effectively discharge accumulated electric charges, improving anti-static performance by arranging STV signal lines to bypass non-STV signal lines and using a serpentine electro-static discharge electrode to alleviate ESD risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If signal lines are lengthened to accommodate larger display products, then the display size increases, but the susceptibility to Electro-Static Discharge (ESD) increases
Solution Approach 1:
The patent segments the signal line routing by introducing a bypass path that separates STV signal lines from non-STV signal lines in the lead area. This segmentation prevents overlapping and reduces ESD susceptibility by dividing the signal transmission path into distinct, non-interfering routes.
Solution Approach 2:
The patent introduces an auxiliary signal line as an intermediary element that connects to the electro-static discharge electrode. This intermediary provides a dedicated discharge path for static electricity, mediating between the STV signal line and the discharge electrode to prevent direct interference with non-STV signal lines.
2Area of stationary object
If signal lines are arranged in overlapping projections to save space, then the area utilization improves, but short circuits occur due to ESD
Solution Approach 1:
The patent applies segmentation by separating the routing of STV and non-STV signal lines in the lead area. Instead of allowing overlapping projections, the STV signal line is routed through a bypass path that spatially separates it from non-STV signal lines, eliminating the short circuit risk while maintaining compact area utilization.
Solution Approach 2:
The patent resolves the spatial conflict by utilizing the bypass path dimension, which allows STV signal lines to route around non-STV signal lines in the lead area. This dimensional approach to routing prevents overlapping projections and eliminates short circuit risks while preserving area efficiency.
3Device complexity
If STV signal lines directly connect to GOA unit circuits without bypass paths, then the circuit complexity is reduced, but ESD protection is insufficient
Solution Approach 1:
The patent introduces an auxiliary signal line as an intermediary that connects STV signal lines to the electro-static discharge electrode. This intermediary element provides dedicated ESD protection without significantly increasing circuit complexity, as the auxiliary line serves a specific protective function rather than a signal transmission function.
Solution Approach 2:
The patent implements preliminary ESD protection by providing a bypass path and electro-static discharge electrode configuration before ESD events can occur. The auxiliary signal line is pre-configured to provide discharge pathways, preventing ESD damage before it can affect the GOA unit circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the risk of ESD by preventing signal line overlaps and enhancing the anti-static performance of the GOA circuit, ensuring reliable operation and preventing display abnormalities caused by electro-static discharge.
Implementation Method 1
an other end thereof is electrically connected to an electro-static discharge electrode; a projection of the auxiliary signal line does not overlap on the lead area the projection of the non-STV signal line on the lead area
Data Source
AI summary
The present disclosure provides a GOA circuit, an array substrate and a display device, wherein the GOA circuit comprises: a GOA area, and the GOA area comprises a plurality of GOA unit circuits cascaded with each other; a lead area, wherein at least one STV signal line and at least one non-STV signal line are arranged in the lead area, each STV signal line and each non-STV signal line is connected to at least one GOA unit circuit, and the non-STV signal line comprises at least one of a Vdd signal line, a Clk signal line, a VGH signal line and a VGL signal line; a projection of the at least one STV signal line on the lead area does not overlap a projection of the at least one non-STV signal line on the lead area.