GOA Circuit Feed-Through Voltage Reduction via Dual Falling Edges

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Solution Overview

Problem

The Gate Driver on Array (GOA) circuit in liquid crystal displays can only output a signal with one falling edge, leading to higher feed-through voltage and nonuniformity in display panels, which is not effectively reduced by existing external integrated circuits.

Innovation Solution

A modified GOA circuit with additional thin film transistors and capacitors allows for the output of a waveform with two falling edges, reducing feed-through voltage by introducing an eleventh thin film transistor and a resistor in the pull-down output unit, and adjusting their properties to control the voltage levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a conventional GOA circuit is used, then the manufacturing process is simple, but the feed-through voltage is high causing display nonuniformity

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddisplay uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The output waveform is segmented into multiple phases with two distinct falling edges instead of a single falling edge. This segmentation of the voltage transition timeline allows the gate voltage to decrease in steps, reducing the feed-through voltage effect on the liquid crystal capacitor while maintaining the overall manufacturing simplicity of the GOA circuit architecture.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If additional thin film transistors and capacitors are added to generate two falling edges, then feed-through voltage is reduced, but device complexity increases

Engineering Contradiction:
Improvedisplay uniformityVSAvoidcircuit structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The additional thin film transistors and capacitors are merged into the existing GOA circuit unit structure. The eleventh thin film transistor and first capacitor are integrated with the pull-down output unit, sharing common nodes and signal lines with other circuit elements. This merging approach minimizes the increase in device complexity while achieving the desired two falling edge waveform for reduced feed-through voltage.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20180033388A1GOA circuit of reducing feed-through voltage
Publication Date: 2018.02.01 WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
  • US20180033388A1 patent drawing
  • US20180033388A1 patent drawing
  • US20180033388A1 patent drawing

AI summary

The present invention provides a GOA circuit of reducing feed-through voltage. An eleventh thin film transistor (T11) and a first capacitor (R1) coupled to the eleventh thin film transistor (T11) in series are added in a pull-down output unit (400). In the output process of the GOA circuit, the eleventh thin film transistor (T11) is activated with the added output control signal (CKF). With the voltage division function of the first resistor (R1), one more falling edge is generated to the waveform outputted by the output end (G(n)). Namely, the waveform outputted by the output end (G(n)) comprises two falling edges. Thereby, the voltage difference before and after the gate of the TFT in the pixel can be decreased to reduce the feed-through voltage and raise the display uniformity of the liquid crystal panel.