GOA Circuit Leakage Control Module for IGZO TFT Stability
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Solution Overview
Problem
The Indium-Gallium-Zinc Oxide (IGZO) TFTs in Gate Driver on Array (GOA) circuits for liquid crystal displays suffer from leakage issues due to lower threshold voltage and subthreshold swing, leading to instability and increased power loss, which is not effectively addressed by existing technologies.
Innovation Solution
A GOA circuit structure is introduced, incorporating a leakage control module in series with GOA units, utilizing a specific configuration of transistors and voltage connections to block leakage pathways during valid scanning signal periods, enhancing circuit stability by controlling leakage through the use of leakage control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If IGZO TFT is used in GOA circuit to achieve lower threshold voltage and lower subthreshold swing, then the switching performance is improved, but leakage current increases and circuit stability deteriorates
Solution Approach 1:
The GOA unit circuit is segmented into multiple functional modules: pull-up module (third transistor), pull-down module (second transistor), pull-down holding module (fifth and eighth transistors), and leakage control module (fourth and seventh transistors). This segmentation allows independent optimization of switching performance and leakage control, resolving the contradiction between fast switching and circuit stability.
Solution Approach 2:
The leakage control module acts as an intermediary between the pull-down holding module and the signal pathways. The seventh transistor specifically blocks leakage current from the gate terminal signal pathway, while the fourth transistor blocks leakage from the pull-down signal pathway. This intermediary structure prevents leakage without affecting the primary switching function.
2Ease of operation
If IGZO TFT is used in GOA circuit to achieve lower threshold voltage, then the transistor control capability is improved, but power loss increases due to leakage
Solution Approach 1:
The leakage control module is activated in advance during the valid period of the scanning signal to block potential leakage pathways before they can cause significant power loss. The seventh transistor is turned on to block the gate terminal signal leakage, and the fourth transistor is turned on to block the pull-down signal leakage, preventing energy loss proactively.
Solution Approach 2:
The leakage control function is extracted as a separate module (fourth and seventh transistors) distinct from the primary switching transistors. This extraction allows the IGZO TFT to maintain its excellent control capability while the dedicated leakage control transistors handle the power loss issue independently.
3Reliability
If leakage control module is added to block leakage pathways, then circuit stability is improved, but device complexity increases
Solution Approach 1:
The leakage control module is merged with the existing pull-down holding module structure. The fourth and seventh transistors are integrated into the signal pathways already present in the GOA unit, sharing common nodes and signal lines. This merging approach adds leakage control functionality while minimizing the increase in overall circuit complexity.
Solution Approach 2:
The leakage control module transistors (fourth and seventh) serve multiple functions: they block leakage current during the valid scanning period, maintain signal integrity, and work cooperatively with the pull-down holding module. This multi-functionality reduces the need for additional dedicated components, thereby limiting the increase in device complexity.
Data Source
AI summary
The application disclosure a GOA circuit and a liquid crystal display. The GOA circuit including a plurality of GOA unit connected in series, wherein a Nth level GOA unit including a fifth transistor, a eighth transistor and a leakage control module. wherein the leakage control module is connected in series between the Nth level gate terminal signal and the drain terminal of the eighth transistor and/or between the Nth level pull-down signal and the drain terminal of the fifth transistor; in the valid period of the Nth level scanning signal can block the Nth level gate terminal signal through the leakage pathway of the eighth transistor and/or to block the Nth level pull-down signal through the leakage pathway of the fifth transistor to achieve the stability of the GOA circuit.