GOA Circuit Multi-Voltage Segmentation for LCD Power Dissipation
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Solution Overview
Problem
Conventional gate driver on array (GOA) circuits for liquid-crystal display (LCD) panels experience high power dissipation due to the use of a single high-level signal to drive both logic and output units, leading to excessive energy consumption.
Innovation Solution
The GOA circuit employs multiple high-level signal sources with distinct voltage levels, utilizing a cascade signal latch module and gate driving signal generating modules to produce gate driving signals, which are then output by a series of inverters, including a first, second, and third stage inverter, comprising PMOS and NMOS transistors, to manage power dissipation effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single high-level signal is used to drive both logic unit and output unit in the GOA circuit, then the circuit structure is simple, but the power dissipation becomes excessively high
Solution Approach 1:
The patent segments the high-level signal into two distinct signals: a first high-level signal with lower voltage for driving the logic unit, and a second high-level signal with higher voltage for driving the output unit. This segmentation allows each signal to be optimized for its specific function, reducing overall power dissipation while maintaining circuit simplicity.
Solution Approach 2:
The patent applies local quality by providing different voltage levels of high-level signals to different parts of the circuit according to their specific requirements. The logic unit receives a lower voltage high-level signal, while the output unit receives a higher voltage high-level signal, optimizing power consumption for each component's specific needs.
2Device complexity
If a single high-level signal is used to drive both logic unit and output unit, then the signal generation is simple, but the power dissipation of the LCD panel becomes too high
Solution Approach 1:
The signal generation is segmented into two separate high-level signal paths. The first high-level signal source generates a lower voltage signal for the logic unit, while the second high-level signal source generates a higher voltage signal for the output unit. This segmentation reduces the overall power dissipation of the LCD panel by preventing excessive voltage from being applied to the logic unit.
Solution Approach 2:
The patent changes the voltage parameter of the high-level signal based on the specific requirements of different circuit components. By adjusting the voltage level of the first high-level signal to be lower than the second high-level signal, the patent optimizes power consumption while maintaining adequate driving capability for each unit.
3Power
If higher voltage is used to drive the output unit, then the output driving capability is sufficient, but the power dissipation increases when driving the logic unit
Solution Approach 1:
The patent applies local quality by providing different voltage levels to different parts of the circuit. The output unit receives the second high-level signal with higher voltage to ensure sufficient driving capability, while the logic unit receives the first high-level signal with lower voltage to minimize power dissipation. Each component receives exactly the voltage level it needs for its specific function.
Solution Approach 2:
The patent segments the power supply into two separate high-level signals with different voltage levels. This segmentation allows the output unit to receive higher voltage for strong driving capability while the logic unit receives lower voltage to reduce power dissipation, thereby resolving the contradiction between output power and energy loss.
Data Source
Figure 1~2
Figure 3
AI summary
A gate driver on array (GOA) circuit comprises a low-level signal source (11), a first high-level signal source (12), a second high-level signal source (13), a cascade signal latch module (14), and a gate driving signal generating module (15). The low-level signal source (11) outputs a low-level signal. The first high-level signal source (12) outputs a first high-level signal. The second high-level signal source (13) outputs the second high-level signal. The cascade signal latch module (14) performs a latch operation on a current-grade cascade signal. The gate driving signal generating module (15) generates a current-grade preliminary gate driving signal. A gate driving signal outputting module (16) outputs a current-grade gate driving signal of the current grade. A voltage of the first high-level signal is less than voltage of the second high-level signal.