GOA Circuit Pull-Up Module Alternating Transistors
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Solution Overview
Problem
The existing GOA circuit faces a significant heating problem due to large capacitance on the clock signal line, which accelerates device aging and can cause accidents, especially in high-resolution and high-refresh-rate products.
Innovation Solution
The proposed GOA circuit incorporates a pull-up module with two thin-film transistors operating alternatively, using two different oscillating signals to reduce the load on the clock signal line and alleviate heating, while also reducing the size of transistors and the pressure on individual thin-film transistors, thereby improving stability and lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the pull-up transistor T21 is made with a large size to drive the whole gate line and satisfy the falling time, then the driving capability is improved, but the capacitance of the clock signal line becomes large causing excessive current and heating
Solution Approach 1:
The pull-up function is segmented into two transistors (T21 and T21') that operate alternatively. Each transistor handles only half of the driving task, reducing the capacitance load on each individual transistor and consequently reducing the current and heating on the clock signal line, while still achieving the required falling time through coordinated operation
Solution Approach 2:
The two pull-up transistors T21 and T21' operate in an alternating periodic manner, with each transistor active for half of the cycle. This periodic operation allows each transistor to handle a reduced capacitance load, decreasing the current drawn from the clock signal line and thereby reducing heating, while maintaining the overall driving capability through the alternating action
2Ease of operation
If the pull-up transistor T21 directly connects to the clock signal line, then the clock signal can directly control the output, but the capacitance of the clock signal line becomes large increasing the current requirement
Solution Approach 1:
The connection between the clock signal line and the pull-up function is segmented by introducing two transistors (T21 and T21') that share the loading duty. Each transistor presents a smaller capacitance load to the clock signal line compared to a single large transistor, thereby reducing the total current required from the clock signal line while maintaining direct clock control capability
Solution Approach 2:
By operating the two pull-up transistors alternatively in periodic cycles, the instantaneous capacitance load on the clock signal line is reduced. Each transistor is active for half the time, allowing the clock signal line to charge and discharge smaller capacitances periodically, which reduces the average current consumption while preserving the direct clock control mechanism
Data Source
AI summary
A GOA circuit and a display panel are disclosed. The GOA unit includes a plurality of stages of cascaded GOA units. Each GOA unit includes a pull-up control module, a pull-up module, a down transmission module, a pull-down remaining module, a pull-down module and a bootstrap capacitor. The pull-up module is deployed with two thin-film transistors, to which different oscillating signals are inputted, having individual output ports. The two transistors can operate alternatively for reducing the time a single thin-film transistor operates, lowering the shift of a threshold voltage and extending a lifespan of the device.