GOA Circuit Segmentation for LCD Border Narrowing

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Solution Overview

Problem

The existing Gate Driver On Array (GOA) circuit in LCDs is not conducive to border narrowing due to signal transmission issues, affecting the overall performance and efficiency of the display.

Innovation Solution

A driving circuit comprising cascaded gate driving units with input, raise, output, feedback, and control modules that raise and maintain the control end voltage signal to multiple high electrical levels, improving signal strength and enabling effective border narrowing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If a GOA circuit is adopted to integrate the gate driving circuit on the glass substrate, then the cost and power consumption are reduced, but the signal transmission is affected when the border of LCD is narrowed

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal transmission
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The gate driving circuit is divided into multiple cascaded gate driving units (first, second, third gate driving units) arranged along the data signal line. Each unit independently drives a portion of the data signal line, segmenting the signal transmission path to improve overall signal integrity and enable border narrowing while maintaining the integrated GOA structure's low power consumption and cost advantages.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If a GOA circuit is adopted to integrate the gate driving circuit on the glass substrate, then the cost is reduced, but the signal transmission is affected when the border of LCD is narrowed

Engineering Contradiction:
ImprovecostVSAvoidsignal transmission
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The gate driving circuit is divided into multiple cascaded gate driving units (first, second, third gate driving units) arranged along the data signal line. Each unit independently drives a portion of the data signal line, segmenting the signal transmission path to improve overall signal integrity and enable border narrowing while maintaining the integrated GOA structure's low power consumption and cost advantages.

Inventive Principle:
Principle #1Segmentation

3Strength

If the control end voltage signal is raised to multiple high electrical levels, then the signal strength is improved, but the device complexity increases

Engineering Contradiction:
Improvesignal strengthVSAvoidcircuit complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The voltage raising function is segmented across multiple gate driving units, with each unit contributing to raising the control end voltage signal to successive high electrical levels. This distributed approach achieves strong signal output while keeping each individual unit's circuit structure relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A feedback module is incorporated to detect the voltage level of the control end voltage signal and provide feedback to the gate driving units. This enables automatic adjustment and maintenance of the voltage signal strength, ensuring reliable operation while simplifying the control mechanism through closed-loop feedback rather than complex open-loop control circuits.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10714040B2Display device, driving circuit and driving method for the same
Publication Date: 2020.07.14 HKC CORP LTD
  • US10714040B2 patent drawing
  • US10714040B2 patent drawing
  • US10714040B2 patent drawing

AI summary

A display device, the driving circuit and the driving method for the same are provided. Wherein, the input module raises a control end voltage signal Qn to a first high electrical level based on the gate scanning signal Gn−2; the raise module raises the signal Qn from the first high electrical level to a second high electrical level based on the clock signal CLKn−2, the clock signal CLKn−1 and the control end voltage signal Qn−1; the output module couples the control end voltage signal Qn from the second high electrical level to a third high electrical level based on the clock signal CLKn and outputs a gate scanning signal Gn based on the signals Qn and CLKn; the feedback module depresses the coupled control end voltage signal Qn; and the control module controls a depression maintain module to maintain the low voltage of the control end voltage signal Qn.