GOA Circuit Threshold Drift Prevention
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Solution Overview
Problem
Gate driver on array (GOA) circuits using indium gallium zinc oxide (IGZO) face issues with threshold voltage drift, leading to transistor conduction errors and circuit output failures due to negative threshold voltage values.
Innovation Solution
The GOA circuit design includes a pull-up circuit with specific switch transistors and a clamping circuit that manages voltage levels to prevent threshold drift, ensuring accurate transistor operation by maintaining appropriate voltage levels across switch transistors, particularly using a third and fourth voltage level (Vss1 and Vss2) where Vss1 is higher than Vss2, and employing a capacitor to stabilize the clock signal levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If IGZO is used to fabricate thin-film transistors in GOA circuits, then transistor size can be reduced and device stability is improved, but threshold voltage drifts to negative values causing transistor conduction errors
Solution Approach 1:
The patent applies preliminary anti-action by introducing a pull-down circuit that proactively counteracts the threshold voltage drift before it causes transistor conduction errors. The pull-down circuit includes a pull-down transistor and capacitor that work together to prevent the gate voltage from drifting to negative values, thereby preventing erroneous transistor conduction before it occurs.
Solution Approach 2:
The patent uses an intermediary approach by introducing a capacitor as a mediating element between the gate electrode and the threshold voltage drift. The capacitor stores charge and maintains the gate voltage at the appropriate level, acting as an intermediary that stabilizes the voltage and prevents direct exposure to threshold drift effects.
2Loss of energy
If IGZO is used to fabricate thin-film transistors in GOA circuits, then device stability is improved and power consumption is reduced, but threshold voltage drift causes circuit output errors
Solution Approach 1:
The pull-down circuit is designed to preemptively counteract threshold voltage drift before it affects circuit output. By maintaining the gate voltage at the correct level through the pull-down transistor and capacitor, the circuit prevents output errors before they occur, ensuring reliable operation while preserving the low power consumption benefits of IGZO.
3Device complexity
If IGZO is used to fabricate thin-film transistors in GOA circuits, then the number of power and thin-film transistors can be reduced, but threshold voltage drift leads to transistor switching failures
Solution Approach 1:
The patent merges the pull-down function into the existing transistor structure by integrating the pull-down transistor and capacitor directly into the GOA circuit architecture. This combination allows the circuit to maintain simplified design with reduced transistor count while adding the necessary threshold voltage stabilization function.
Solution Approach 2:
The pull-down transistor serves multiple functions: it acts as a switching element in the GOA circuit while simultaneously functioning as a threshold voltage stabilization element. The capacitor also serves dual purposes by storing charge for voltage stabilization and by timing the operation of the pull-down function, thereby reducing the need for separate dedicated components.
Data Source
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AI summary
A GOA circuit, and liquid crystal display. The GOA circuit comprises: a pull-up circuit (11) comprising a first switch transistor (T1) and a scan output end (G(N)) coupled to a second connection end of the first switch transistor (T1); and a pull-up control circuit (12) comprising a second switch transistor (T2), a third switch transistor (T3) comprising a first connection end coupled to a second connection end of the second switch transistor (T2) and a second connection end coupled to a control end of the first switch transistor (T1), and a fourth switch transistor (T4) comprising a control end coupled to the control end of the first switch transistor (T1), a first connection end coupled to the first connection end of the third transistor (T3), and a second connection end coupled to the scan output end (G(N)). The fourth switch transistor is used to control, when the scan output end (G(N)) outputs a first voltage level, the voltage level of a control end of the third switch transistor (T3) to be lower than the voltage level of the first connection end of the third switch transistor (T3). In this way, the present invention prevents a transistor from being incorrectly turned on or off because of a threshold drift, and accordingly prevents a circuit output error.