GOA Circuit Transistor Reduction for Narrow Border Displays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing Gate Driver on Array (GOA) circuit suffers from instability due to threshold voltage drift in thin film transistors, leading to attenuation of output signals and a vicious circle of failures, which increases the number of transistors and area occupied, and results in border widening in display panels.
Innovation Solution
A cascaded GOA circuit structure is introduced, comprising pull-up, pull-down, and transfer circuit units, along with a capacitor, to reduce the number of thin film transistors and stabilize the circuit by using clock signals that have not been attenuated, thereby preventing failures caused by threshold voltage drifting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an inverter consisting of thin film transistors is added to maintain thin film transistors, then reliability of the circuit is improved, but the number of thin film transistors increases and area occupied by the GOA circuit increases
Solution Approach 1:
The patent extracts and eliminates the inverter circuit (T51, T52, T53, T54) from the GOA circuit design. By removing this redundant component, the circuit maintains reliability through a simplified architecture that uses fewer transistors, directly resolving the contradiction between reliability and device complexity
Solution Approach 2:
The patent uses a simplified circuit configuration that replicates the essential functionality of the inverter without copying its complex transistor structure. The pull-up and pull-down control circuits achieve the same signal maintenance function with fewer components
2Reliability
If an inverter consisting of thin film transistors is added to maintain thin film transistors, then reliability of the circuit is improved, but area occupied by the GOA circuit increases resulting in wider border
Solution Approach 1:
The patent removes the inverter circuit from the design, extracting the redundant functionality and retaining only the essential signal generation and control components. This extraction reduces the area occupied by the GOA circuit while preserving circuit reliability
Solution Approach 2:
The patent merges the pull-up and pull-down control functions into a more integrated circuit architecture. By combining these functions and eliminating the separate inverter stage, the overall circuit area is reduced while maintaining the necessary reliability
3Device complexity
If gates of thin film transistors are controlled by attenuated signal, then circuit operation is simplified, but threshold voltage drifting causes vicious circle leading to circuit failure
Solution Approach 1:
The patent introduces a feedback mechanism through the pull-up control circuit (T11, T12, T13) and pull-down control circuit (T23, T24, T25) that continuously monitors and adjusts the signals QN and STN. This feedback prevents the vicious circle of attenuation by actively compensating for threshold voltage drift and maintaining signal integrity
Solution Approach 2:
The patent implements preliminary action by using the pull-up and pull-down control circuits to pre-establish stable signal levels before they are used to control the main transistors. This preliminary stabilization prevents the propagation of attenuated signals that would otherwise lead to circuit failure
Data Source
AI summary
A GOA circuit and a display panel are provided. The GOA circuit and the display panel decrease thin film transistors required by an inverter in a circuit structure. A thin film transistor number is decreased, and an area occupied by a GOA space can be effectively decreased, which facilitates decreasing of border sizes of panels. Gates of thin film transistors of the GOA circuit are controlled by clock signals that have not been attenuated, which can prevent failure resulting from an attenuated cascaded signal caused by threshold voltage drifting of thin film transistors.