GOA Unit Circuit Dual Output for Narrow Border AMOLED
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Solution Overview
Problem
Current gate-driving circuits for AMOLED displays have limitations in reducing border dimension and increasing PPI resolution, as they typically provide only one gate-driving signal per unit, which hinders the advancement of display panel design.
Innovation Solution
A gate-on-array (GOA) unit circuit with multiple sub-circuits and a cascaded series configuration that outputs two gate-driving signals per unit, utilizing N-type transistors and specific clock signals to control voltage levels and output signals, enabling efficient data loading and light emission in subpixel circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If gate-driving circuit is transferred from external integrated circuit to display panel, then border dimension is reduced, but device complexity increases
Solution Approach 1:
The gate-driving circuit is divided into multiple GOA unit circuits that are segmented and distributed across different regions of the display panel. Each unit circuit is an independent functional module that can be cascaded to drive multiple rows of subpixel circuits, reducing the need for a large external gate-driving circuit and thereby reducing border dimension.
Solution Approach 2:
The gate-driving functionality is moved from a two-dimensional external circuit board to a three-dimensional integration within the display panel itself, utilizing the vertical space and layered structure of the panel to accommodate the gate-driving circuits, thus reducing the horizontal border dimension.
2Productivity
If one gate-driving signal per unit is provided, then device complexity is kept simple, but productivity is limited
Solution Approach 1:
Each GOA unit circuit is designed with multi-functionality to output multiple gate-driving signals (first and second output signals) simultaneously. This allows a single unit circuit to drive multiple rows of subpixel circuits, increasing productivity without requiring a proportional increase in the number of unit circuits.
Solution Approach 2:
Multiple gate-driving signal generation functions are merged into a single GOA unit circuit. The unit circuit integrates input signal processing, clock signal synchronization, and multiple output signal generation capabilities, allowing one unit to perform the work of multiple traditional units and thereby increasing productivity.
Data Source
AI summary
A GOA unit circuit is provided with an input sub-circuit configured to set a turn-on voltage to a first node and a turn-off voltage to a second node in response to an input signal and a first clock signal; a first pull-down sub-circuit, a pull-up sub-circuit, a first control sub-circuit, and a second control sub-circuit configured to set voltage levels of the first, the second, and a third nodes. The gate on array unit circuit also includes a first output sub-circuit to output a first output signal at the turn-on voltage triggered by a second clock in response to voltage levels at the first, second nodes and a second output sub-circuit to output a second output signal falling to the turn-off voltage triggered by the first clock and rising to the turn-on voltage triggered by the third clock in response to voltage levels at the first, third nodes.