GOA Gate Drive Circuit With Pull-Up Sustain for Narrow Bezels
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Solution Overview
Problem
The complex structure of Low Temperature Poly-Silicon (LTPS) Gate Driver On Array (GOA) drive circuits leads to high power consumption and increased manufacturing costs, particularly for small-sized display devices, where a narrow frame design is crucial for user experience and the complexity of CMOS and NMOS circuit types necessitates more manufacturing procedures.
Innovation Solution
A multi-stage GOA drive circuit is introduced, comprising a signal afferent unit, output unit, pull-up control unit, and pull-up sustaining unit, which reduces the number of Thin Film Transistors (TFTs) and simplifies the structure by driving two adjacent gate lines with one stage, utilizing a clock cycle with staggered clock signals to maintain gate signals in a high-level state during non-effective periods and prevent leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CMOS or NMOS circuit types are used in LTPS GOA drive circuits, then the mobility ratio of carriers is improved, but the manufacturing costs increase due to more manufacturing procedures and complex photomask requirements
Solution Approach 1:
The patent uses PMOS circuit type instead of more complex CMOS or NMOS types, accepting slightly lower carrier mobility in exchange for significantly reduced manufacturing complexity and cost. This principle of choosing a simpler, more manufacturable solution that still meets performance requirements resolves the contradiction between reliability and ease of manufacture.
2Reliability
If CMOS circuit structure is used, then the carrier mobility ratio is improved, but the circuit structure becomes complex and ultra-narrow frame design becomes difficult to realize
Solution Approach 1:
The patent adopts a simpler PMOS-based circuit structure instead of complex CMOS, reducing the number of transistors and interconnections. This simplification enables ultra-narrow frame design by reducing the area occupied by the gate drive circuit, directly resolving the contradiction between reliability and device complexity.
3Reliability
If complex LTPS GOA drive circuit structure is used, then the scanning drive capability is improved, but the power consumption increases
Solution Approach 1:
The patent extracts and removes unnecessary components and circuit stages from the traditional multi-stage GOA drive circuit. By using a simplified single-stage or reduced-stage architecture with PMOS transistors, it maintains adequate scanning drive capability while significantly reducing the number of active elements that consume power, thus resolving the contradiction between reliability and energy usage.
Data Source
AI summary
A gate drive circuit is disclosed. The gate drive circuit comprises multi-stage of GOA drive unit, and each stage of GOA drive unit comprises a signal afferent unit, used for outputting a pull-down control signal; an output unit, used for outputting a first gate signal and a second gate signal; a pull-up control unit, used for outputting a pull-up control signal; and a pull-up sustaining unit, used for pulling up an electric potential of the control end of the output unit to an electric potential of the direct-current power supply according to the pull-up control signal, so that the first gate signal and the second gate signal are maintained in a high-level state.