GOA Circuit Inversion Module Clock Signal Sharing

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Solution Overview

Problem

Existing GOA circuits require a large number of signal transmission lines and suffer from output signals being in the same potential state for a long time, leading to increased stress on thin film transistors and reduced reliability.

Innovation Solution

The GOA circuit incorporates a cascaded gate driving unit with an inversion module, where the first, second, and third input terminals are connected to a clock signal, allowing the output terminal to alternate between high and low potentials, reducing the duration of a single potential state and sharing the clock line to save signal transmission lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a low-frequency control signal (LC1 or LC2) is used in combination with an inverter to control a thin film transistor, then the thin film transistor can be controlled to be in an on state or an off state, but the number of signal transmission lines increases and the gate potentials remain in the same state for a long time, increasing stress and reducing reliability

Engineering Contradiction:
Improvereliability of GOA circuitVSAvoidnumber of signal transmission lines
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple signal transmission lines into a single clock signal line. By using the clock signal simultaneously for controlling multiple thin film transistors in different gate driving units, the circuit eliminates the need for separate low-frequency control signal lines (LC1, LC2), thereby reducing the number of transmission lines while improving reliability through more frequent potential switching

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The clock signal line is given multi-functional use, serving both as a timing signal for the shift register and as a control signal for the inversion modules in multiple gate driving units. This universal usage of the clock signal replaces the need for dedicated low-frequency control lines, reducing overall circuit complexity while enhancing transistor reliability

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a low-frequency control signal (LC1 or LC2) is used in combination with an inverter to control a thin film transistor, then the thin film transistor can be controlled to be in an on state or an off state, but the gate potentials remain in the same state for a long time, increasing stress and reducing reliability

Engineering Contradiction:
Improvereliability of GOA circuitVSAvoidduration of same potential state
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements periodic switching of gate potentials by connecting the inversion module's control terminals to the clock signal. This causes the output potential to switch periodically at the clock frequency, preventing the gate potential from remaining in the same state for extended periods. The periodic action reduces stress on thin film transistors by ensuring frequent potential transitions, thereby improving reliability without requiring additional time

Inventive Principle:
Principle #19Periodic action

3Ease of operation

If separate signal transmission lines are used for low-frequency control signals (LC1 or LC2), then precise control of thin film transistors is achieved, but the bezel space required by the GOA circuit increases

Engineering Contradiction:
Improvecontrol precision of thin film transistorVSAvoidbezel space of GOA circuit
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent combines multiple control functions into a single clock signal transmission line. By using the clock signal to control the inversion modules that in turn control the thin film transistors, the circuit eliminates the need for separate low-frequency control signal lines. This merging of functions reduces the number of transmission lines required, thereby decreasing the bezel space occupied by the GOA circuit while maintaining control precision

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11763718B1GOA circuit and array substrate
Publication Date: 2023.09.19 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US11763718B1 patent drawing
  • US11763718B1 patent drawing
  • US11763718B1 patent drawing

AI summary

The present application provides a GOA circuit and an array substrate. The GOA circuit includes a plurality of cascaded gate driving units, wherein an N-th level gate driving unit includes an inversion module, and a portion of a clock signal can be output from an output terminal of the inversion module. Since a frequency of the clock signal is much higher than a frequency of a low-frequency control signal, a duration during which an output signal of the inversion module is kept at a same potential is reduced.