GOA Circuit Potential Holding for Touch Phase Leakage
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Solution Overview
Problem
Current gate driver on array (GOA) circuits experience leakage during the touch phase, leading to difficulty in maintaining potential at key nodes and resulting in distorted gate-driving waveforms, which affects display performance.
Innovation Solution
The proposed GOA circuit includes a scan control circuit, reverse circuit, gate signal output circuit, and potential holding circuit, forming a self-feedback loop to maintain the potential of the first driving signal during the touch phase, ensuring a normal gate-driving waveform output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If the GOA circuit operates during the touch phase, then the display function continues, but leakage occurs and the potential at the key node cannot be maintained
Solution Approach 1:
The patent introduces a feedback mechanism where the potential holding circuit monitors the potential at the key node and adjusts its output accordingly. When leakage causes potential droop, the feedback signal activates the potential holding circuit to compensate, thereby maintaining the potential at the key node throughout the touch phase.
Solution Approach 2:
The patent introduces a potential holding circuit as an intermediary component between the clock signal generation circuit and the gate driving output. This intermediary circuit specifically addresses the leakage issue by providing additional potential to compensate for leakage currents, ensuring stable operation during the touch phase.
2Adaptability or versatility
If the clock signal is set to low during touch phase, then touch signal detection is enabled, but the gate-driving waveform becomes distorted
Solution Approach 1:
The patent segments the GOA circuit into multiple functional blocks: scan control circuit, reverse circuit, gate signal output circuit, and potential holding circuit. Each block performs a specific function, allowing the clock signal to be set to low for touch detection while the potential holding circuit independently maintains the potential at the key node, preventing waveform distortion.
Solution Approach 2:
The potential holding circuit uses feedback from the key node potential to dynamically adjust its output, ensuring that the gate-driving waveform remains accurate even when the clock signal is in the low state during touch phase.
3Manufacturing precision
If the potential at the key node is maintained during touch phase, then the gate-driving waveform remains accurate, but additional circuit components are required
Solution Approach 1:
The potential holding circuit is designed with multi-functionality, serving both as a potential maintenance circuit during touch phase and as part of the normal clock signal generation pathway during display phase. This reduces the overall complexity compared to having separate dedicated circuits for each function.
Data Source
AI summary
A gate driver of array (GOA) circuit includes a plurality of cascaded GOA units, wherein an N-th GOA unit includes a scan control circuit, a reverse circuit, a gate signal output circuit, and a potential holding circuit. The reverse circuit is coupled to the scan control circuit. The gate signal output circuit is coupled to an Nth clock signal, the scan control circuit, and the reverse circuit. The potential holding circuit is coupled to the scan control circuit, the reverse circuit, and the gate signal output circuit.