Gate-on Array Shift Register with Alternating Stable Modules
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Solution Overview
Problem
Current Gate-On Array (GOA) technology for liquid crystal display driver circuits relies on transistors that are constantly in a positive state, leading to rapid reliability decline due to insufficient rest time, resulting in low display quality or device damage.
Innovation Solution
A gate-on array shift register with at least three stable modules, each with a different frequency work clock and work cycles less than 50%, alternately working to stabilize the control and output terminals, reducing DC bias and maintaining transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are kept in a positive state continuously to maintain driving function, then the driving capability is ensured, but the reliability of transistors declines rapidly due to insufficient rest time
Solution Approach 1:
The shift register is divided into multiple stages (first stage, second stage, third stage, etc.), with each stage containing transistors that operate in alternating patterns. This segmentation allows different transistor groups to take turns in active and resting states, ensuring continuous driving function while providing rest periods for individual transistor groups.
Solution Approach 2:
The circuit employs periodic switching between different operational states using clock signals (CLK1, CLK2, CLK3). Transistors are alternately switched on and off in a periodic manner, ensuring that while some transistors are active, others are resting. This periodic action prevents any single transistor from remaining in a positive state continuously, thereby maintaining reliability.
2Reliability
If multiple stable modules with different frequency clocks are used to increase transistor reliability, then reliability improves, but the device complexity increases
Solution Approach 1:
The circuit is segmented into multiple stable modules (first stable module, second stable module, third stable module), each handling specific transistor groups. This modular segmentation allows for systematic management of complexity while achieving improved reliability through distributed operation.
Solution Approach 2:
Different frequency clocks (CLK1, CLK2, CLK3) are used to create periodic switching patterns in each stable module. The periodic action is carefully designed so that while multiple clocks are present, they coordinate to ensure that transistor groups in different modules operate in complementary cycles, managing overall complexity while achieving reliability goals.
Data Source
AI summary
A gate-on array shift register includes a signal-input unit, a control transistor and at least three stable modules. The signal-input unit receives and outputs a previous-stage output signal. The control terminal of the control transistor is electrically coupled to the signal-input unit for receiving the previous-stage output signal. The control transistor outputs corresponding output signal on output terminal of the shift register according to the previous-stage output signal. Each of the stable modules is electrically coupled to the control terminal of the control transistor and the output terminal of the shift register to stabilize voltage of the terminals.