GOA Shift Register Element for Narrow Bezel Display Integration

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Solution Overview

Problem

In thin film transistor displays, the existing gate driver circuits for providing gate driving signals to TFTs in a pixel area face challenges in design and production, including increased costs, aesthetically unpleasing designs, and reduced production throughput due to the need for bonding areas and fan-out wiring, which complicates the integration process and affects the yield ratio.

Innovation Solution

A shift register element is designed with specific input, node control, and output circuits, including switch transistors and capacitors, that control signal levels and clock signals to efficiently drive gate lines, allowing for a more integrated and compact gate driver circuit that reduces the number of shift register elements required, thereby facilitating a narrow bezel design and improved production efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If traditional gate driver circuits are used with separate bonding areas and fan-out wiring, then the gate driving function is achieved, but the design aesthetics deteriorates and production throughput decreases

Engineering Contradiction:
Improveproduction throughputVSAvoidintegration process complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the gate driver circuit and the display array into a single integrated structure using GOA technology. The shift register elements are directly formed on the array substrate alongside the pixel circuits, eliminating the need for separate bonding areas and fan-out wiring. This integration reduces the number of manufacturing steps and improves production throughput while maintaining the gate driving function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The array substrate serves multiple functions: it acts as both the display pixel array substrate and the gate driver circuit substrate. The same substrate performs both functions simultaneously, eliminating the need for separate driver circuit substrates and bonding processes, thereby simplifying the integration process and improving manufacturing efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If bonding areas and fan-out wiring are included, then gate driving is achieved, but the bezel width increases and design flexibility is reduced

Engineering Contradiction:
Improvedesign flexibilityVSAvoidbezel area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

By merging the gate driver circuit with the display array on the same substrate, the patent eliminates the need for separate bonding areas and fan-out wiring regions. This integration allows for a narrower bezel design and provides greater flexibility in display panel layout and design configurations.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If more shift register elements are used to cover all gate lines, then complete gate control is achieved, but the number of elements and circuit complexity increases

Engineering Contradiction:
Improvegate line control effectivenessVSAvoidnumber of shift register elements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the gate lines into different groups that can be controlled by different shift register elements. Each shift register element can control multiple gate lines through shared control nodes, reducing the total number of shift register elements needed while ensuring complete and reliable gate line control across the display array.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The shift register elements are designed with multi-functional capability where each element can control multiple gate lines through shared control nodes. This universal control approach reduces the number of shift register elements required compared to a one-to-one mapping, thereby reducing circuit complexity while maintaining effective gate line control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Ease of manufacture

If integrated GOA process is used, then cost is reduced and aesthetics are improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemanufacturing costVSAvoidintegration precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent merges the gate driver circuit fabrication with the display array fabrication into a single GOA process flow. Both circuits are formed simultaneously using the same thin-film transistor fabrication steps on the same substrate, which reduces manufacturing cost and eliminates the need for separate bonding processes, though it requires precise control of the shared fabrication process.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11282470B2Shift register element, method for driving the same, gate driver circuit, and display device
Publication Date: 2022.03.22 ORDOS YUANSHENG OPTOELECTRONICS
  • US11282470B2 patent drawing
  • US11282470B2 patent drawing
  • US11282470B2 patent drawing

AI summary

This disclosure discloses a shift register element, a method for driving the same, a gate driver circuit, and a display device. The shift register element comprises a first input circuit, a second input circuit, a first node control circuit, a second node control circuit, a third node control circuit, and N output circuits, where the first input circuit, the second input circuit, and the first node control circuit are configured to control a first node, the second node control circuit is configured to control a second node so that the third node control circuit controls the third node according to the first node and the second node, and the N output circuits control corresponding output terminals according to corresponding clock signal terminals under the control of the first node.