GOA Shift Register Pull-Down Feedback Circuit for Tailing Reduction

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Solution Overview

Problem

The existing Gate Driver on Array (GOA) technology in display panels faces challenges in minimizing error-proof charging time and improving tailing when pulling down the gate scan signal, which affects the charging efficiency of liquid crystal display panels.

Innovation Solution

The implementation of a shift register with a pull-down feedback circuit, including first and second switches, that assists in charging the quiescent point voltage signal, minimizing error-proof charging time and improving tailing by utilizing a clock signal with three levels (low preset, high, and preset lower levels) to facilitate rapid discharging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the gate scan signal is pulled down using conventional GOA technology, then the signal transmission is completed, but the error-proof charging time is extended and tailing occurs

Engineering Contradiction:
Improveerror-proof charging timeVSAvoidcharging efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent implements a pull-down feedback circuit that uses the subsequent-stage gate scan signal to control the discharge of the current-stage quiescent point voltage. When the subsequent-stage gate scan signal transitions to low level, it activates the pull-down circuit, creating a feedback mechanism that accelerates the discharge process and reduces the error-proof charging time required for the next charging cycle.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a three-level clock signal (low preset level, high level, and preset lower level) to change the voltage parameters during the discharge process. By utilizing a preset lower level that is lower than the low preset level, the voltage difference is increased, enabling faster discharge of the quiescent point voltage and reducing the error-proof charging time while improving charging efficiency.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If the quiescent point voltage is discharged slowly, then the signal stability is maintained, but the tailing phenomenon occurs and charging time is reduced

Engineering Contradiction:
Improvesignal stabilityVSAvoidcharging time
Core Design Contradiction:
Stability of the object's compositionVSDuration of action of moving object

Solution Approach 1:

The patent implements a dynamic discharge mechanism where the discharge speed is controlled by the subsequent-stage gate scan signal. During normal operation, the discharge is gradual to maintain stability, but when the subsequent-stage signal transitions, the discharge accelerates rapidly to eliminate tailing. This dynamic adjustment allows the system to adapt between stability and speed requirements at different operational phases.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The pull-down feedback circuit is prepared in advance and activated by the subsequent-stage gate scan signal transition. This preliminary action ensures that the discharge process is already initiated before the current-stage gate scan signal needs to be charged, reducing the error-proof charging time and preventing tailing while maintaining signal stability throughout the cycle.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11114055B2Shift register, display panel, and driving method of shift register
Publication Date: 2021.09.07 HKC CORP LTD
  • US11114055B2 patent drawing
  • US11114055B2 patent drawing
  • US11114055B2 patent drawing

AI summary

Disclosed are a shift register, a display panel, and a driving method for a shift register. The driving method is applied in a display panel using a GOA technology. The display panel has a plurality of cascaded shift registers. The shift register includes an output circuit and a pull-down feedback circuit. The pull-down feedback circuit includes a first switch and a second switch. A control end of the first switch receives a quiescent point voltage signal of a subsequent stage as a feedback signal, so as to pull down the quiescent point voltage to a gate scan signal of a subsequent stage. A control end of the second switch receives a gate scan signal of a subsequent stage as a feedback signal, so as to pull down the gate scan signal of the gate line to a low preset level.