GOA Shift Register Reset Circuit for Unstable Reset Signals

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Solution Overview

Problem

The reset signal instability in Gate Drive on Array (GOA) units leads to faulty conduction of transistors, resulting in improper reset operations in liquid crystal display panels.

Innovation Solution

A shift register unit is designed with a reset module comprising transistors that ensure stable reset operations by controlling the connection of storage capacitors and gate output terminals, using a second transistor and a fifth transistor to maintain proper voltage levels even when the reset signal is unstable, and an output control module to manage clock signal levels effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a simple reset module with one transistor is used, then the device complexity is reduced, but the reliability of reset operation deteriorates due to signal instability causing faulty conduction

Engineering Contradiction:
Improvereset operation reliabilityVSAvoidreset module complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reset module is segmented into multiple transistors (second transistor for storage capacitor control, fourth transistor for gate output control, and fifth transistor for voltage level control) instead of using a single transistor. This segmentation allows each transistor to handle specific control tasks, improving overall reset reliability while managing complexity through functional division.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fifth transistor acts as an intermediary element that controls the voltage level at the storage capacitor based on the reset signal. This intermediary mechanism ensures that the reset operation proceeds correctly even when the reset signal is unstable, as the fifth transistor mediates between the unstable reset signal and the critical storage capacitor node.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple transistors are added to control reset stability, then the reliability of reset operation is improved, but the device complexity increases

Engineering Contradiction:
Improvereset operation reliabilityVSAvoidreset module complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reset module merges multiple control functions into a unified structure where the second, fourth, and fifth transistors work together under a single reset signal. The fifth transistor merges the control of storage capacitor voltage with the reset signal, while the second and fourth transistors simultaneously handle capacitor and output terminal reset, respectively. This merging approach improves reliability without proportionally increasing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The reset module achieves multi-functionality where a single reset signal controls multiple transistors that perform diverse functions: resetting the storage capacitor, resetting the gate output terminal, and controlling voltage levels. This universal control mechanism improves reliability by ensuring coordinated reset operations across multiple circuit nodes without requiring separate control signals for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3038099B1Shift register unit and driving method therefor, shift register circuit and display device
Publication Date: 2019.05.08 BOE TECHNOLOGY GROUP CO LTD
  • EP3038099B1 patent drawingFigure 1
  • EP3038099B1 patent drawingFigure 2~3

AI summary

The application relates to a shift register unit and a driving method thereof, a shift register circuit and a display apparatus. The shift register unit may include a gate starting terminal, a first clock terminal, a second clock terminal, a reset terminal, a low level terminal, a gate output terminal, a storage capacitor, a charging module, an output control module and a reset module. In the shift register according to the present application, since the reset operation is under control of the second transistor and the fifth transistor both, an improper reset operation will not occur, even if the signal at the reset terminal is unstable.