GOA Shift Register Circuit for Stable Gate Driving Output
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Solution Overview
Problem
The output of shift register units in gate driving circuits is unstable, leading to abnormal display in display apparatuses, particularly in high-integration and low-cost display technologies where Gate Driver on Array (GOA) is employed.
Innovation Solution
A shift register unit design incorporating an input circuit, reset circuit, node control circuit, cascade output circuit, and driving output circuit, utilizing transistors and capacitors to stabilize signal levels and improve load capacity, with specific transistor configurations and signal connections to enhance stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional shift register unit is used in a gate driving circuit, then the circuit can be integrated on the array substrate, but the output signal becomes unstable
Solution Approach 1:
The shift register unit is divided into distinct functional modules: input circuit (first transistor), reset circuit (second transistor), node control circuit (third, fourth, fifth transistors), cascade output circuit (sixth transistor), and driving output circuit (seventh transistor). Each module performs a specific function, allowing independent optimization and improving overall signal stability without requiring complete redesign of the entire circuit.
Solution Approach 2:
A control node is introduced as an intermediary element that receives signals from multiple transistors (third, fourth, and fifth transistors) and coordinates their operations. This control node acts as a mediator that synchronizes the input, reset, and output operations, ensuring stable signal transmission through the shift register unit while managing the complexity of multiple circuit interactions.
2Reliability
If the shift register unit is designed with multiple circuits to stabilize output, then signal stability improves, but the circuit complexity increases
Solution Approach 1:
Multiple circuit functions are merged into a compact shift register unit structure where the input circuit, reset circuit, node control circuit, cascade output circuit, and driving output circuit are integrated together. This merging approach allows the circuits to work in coordination with shared control nodes and timing signals, achieving signal stability without requiring separate independent circuits for each function.
Solution Approach 2:
The shift register unit is designed with multi-functional transistors and control nodes that serve multiple purposes. For example, the control node receives inputs from multiple transistors and coordinates both cascade output and driving output functions. This universality reduces the need for dedicated separate circuits, maintaining signal stability while controlling overall circuit complexity.
3Power
If the load capacity is increased to drive more elements, then the driving capability improves, but the leakage current increases
Solution Approach 1:
The shift register unit employs dynamic control of transistor switching states through the node control circuit. The control node dynamically adjusts the switching timing and states of the input, reset, and output transistors based on clock signals and feedback, allowing the circuit to optimize its power consumption and minimize leakage current while maintaining sufficient load capacity for driving display elements.
Data Source
AI summary
An apparatus that includes a shift register unit, a gate driving circuit, and a display apparatus. The shift register unit includes: an input circuit, a reset circuit, a node control circuit, a cascade output circuit and a drive output circuit, where the drive output circuit is configured to provide the signal of the clock signal end to a drive output end in response to the signals of the first node.