GOA Array Substrate Layout to Prevent Oxide TFT Conduction
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Solution Overview
Problem
Oxide thin film transistors in display panels are prone to being rendered conductive during the manufacturing process, leading to abnormal characteristics and poor display effects, which affects the yield and cost-effectiveness of flexible display panels.
Innovation Solution
The array substrate incorporates a plurality of first patterns disposed on one side of the GOA region, which ensures sufficient etching solution for forming the GOA region and the source/drain electrodes of the thin film transistors, preventing residual material from causing the active layer to become conductive.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If oxide thin film transistors are used in flexible display panels, then fewer process steps, higher mobility and better bending performance are achieved, but the active layer is easily rendered conductive during manufacturing, leading to abnormal transistor characteristics and poor display effects
Solution Approach 1:
The patent introduces an intermediary substance (etching solution) and optimizes its distribution through the etching solution supply structure. This intermediary mediates between the manufacturing process requirements and the transistor stability, ensuring sufficient etching solution reaches the GOA region to prevent residual material formation that would otherwise render the active layer conductive.
Solution Approach 2:
The patent segments the etching solution supply path into multiple components: etching solution supply holes in the substrate, distribution channels, and supply patterns. This segmentation ensures that etching solution is delivered efficiently to specific regions (GOA region) where it is most needed, preventing the active layer from becoming conductive while maintaining manufacturing productivity.
2Ease of manufacture
If the GOA region is formed without sufficient etching solution supply, then manufacturing is simpler, but residual material remains causing the active layer to become conductive
Solution Approach 1:
The patent implements preliminary action by pre-forming etching solution supply holes in the substrate before forming the GOA region and thin film transistors. This preliminary preparation ensures that etching solution can be supplied during subsequent manufacturing steps, preventing residual material formation and maintaining active layer insulation properties without complicating the overall manufacturing process.
Solution Approach 2:
The etching solution acts as an intermediary that is delivered through the supply holes and distribution structure. This intermediary enables precise control of the etching process, ensuring complete material removal in the GOA region while preventing residual material that would compromise active layer conductivity control.
3Reliability
If etching solution supply structures are added to prevent active layer conduction, then transistor characteristics are maintained, but device complexity increases
Solution Approach 1:
The substrate serves multiple functions: it acts as both the structural base for the display panel and as the etching solution supply structure. The etching solution supply holes are formed in the substrate itself, combining the substrate's structural role with the etching solution delivery function, thereby maintaining transistor reliability without significantly increasing device complexity.
Solution Approach 2:
The etching solution supply structure utilizes the substrate's own structure (supply holes) to deliver etching solution directly to where it is needed. This self-service approach eliminates the need for separate, complex delivery systems, maintaining transistor characteristic stability while minimizing additional device complexity.
Data Source
AI summary
Provided is an array substrate. The array substrate includes a substrate, comprising a display region and a peripheral region surrounding the display region, the peripheral region at least including a gate-driver-on-array (GOA) region extending in a first direction; a plurality of thin film transistors, the plurality of thin film transistors being disposed at least in the GOA region; and a plurality of first patterns, wherein the plurality of first patterns are disposed at least on one side of the GOA region, the plurality of first patterns are spaced apart from the GOA region in the first direction, and a plurality of first patterns disposed on a same side of the GOA region are arranged in an array.