GOA Control Switch Layout for Uneven Etching Short Prevention
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Solution Overview
Problem
In the manufacturing of Gate Driver on Array (GOA) circuits for display panels, uneven etching can lead to short circuits between the source and drain electrodes due to the increasing integration density and decreasing distance between them, causing connectivity issues during the etching process.
Innovation Solution
The design includes a thin film transistor with a source electrode having at least two parallel source branches and a drain electrode with parallel drain branches, where the channel width between the first source branch connected to the source lead and the adjacent drain branch is greater than that between the second source branch and the adjacent drain branch, preventing short circuits even with uneven etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the degree of integration of GOA circuits is increased, then the product cost is reduced, but the distance between source and drain electrodes becomes smaller, causing short circuits due to uneven etching
Solution Approach 1:
The patent applies local quality by making the channel width non-uniform across different source branches. Specifically, the first source branch (directly connected to source lead) has a larger channel width than the second source branch. This local differentiation provides a safety margin in the critical region where uneven etching is most likely to cause short circuits, while maintaining tighter spacing in less critical areas to preserve high integration density.
2Area of stationary object
If the distance between source and drain is reduced to increase integration, then manufacturing complexity increases due to uneven etching, but reducing distance improves circuit compactness
Solution Approach 1:
The patent employs asymmetry by designing unequal channel widths for different source branches. The first source branch has a larger channel width compared to the second source branch. This asymmetric design strategically places the larger margin where it is most needed (at the source lead connection point) to compensate for etching non-uniformity, enabling compact circuit layout without sacrificing manufacturing precision.
3Ease of manufacture
If source, drain and source leads are etched at the same time, then the manufacturing process is simplified, but uneven etching causes short circuits between source and drain
Solution Approach 1:
The patent implements beforehand cushioning by pre-compensating for potential etching non-uniformity through asymmetric channel width design. The larger channel width at the first source branch creates a protective margin before the actual etching process occurs. This proactive design ensures that even if etching is uneven, the source lead will not short circuit to the drain electrode, maintaining reliability while keeping the manufacturing process simple.
Data Source
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AI summary
A control switch of a drive circuit (200), an array substrate (100), and a display panel (400) are disclosed. The control switch includes a thin film transistor (220). In the thin film transistor (220), each source branch (231) directly connected to a source lead (210) is a first source branch (232), and each source branch (231) not directly connected to the source lead (210) is a second source branch (233). A channel width between the first source branch (232) and the adjacent drain branch (241) is greater than that between the second source branch (233) and the adjacent drain branch (241).