GOA Circuit Voltage Stabilization Module for Ripple Suppression

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Solution Overview

Problem

In high-resolution display panels, the increasing size of thin film transistors in gate driver on array (GOA) circuits leads to parasitic capacitance, causing errors in data signal writing due to premature turning-on of buffering transistors when the clock signal rises, resulting in signal ripples and errors in pre-charging points.

Innovation Solution

The GOA circuit incorporates a voltage stabilization module with indium gallium zinc oxide (IGZO) thin film transistors, which divides the voltage at pre-charging points to suppress ripples and prevent errors, using cascaded GOA units with pull-up, transfer-down, and pull-down modules to control node potentials and output signals effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the size of thin film transistor in GOA circuit is increased to support high-resolution panels, then the driving capability is improved, but the parasitic capacitance increases causing data signal errors

Engineering Contradiction:
Improvedata signal writing accuracyVSAvoidparasitic capacitance effect
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a voltage stabilization module as an intermediary component between the clock signal input and the data signal writing path. This module includes a stabilization transistor connected to the pre-charging node, which acts as a mediator to suppress the harmful voltage ripples caused by parasitic capacitance before they can affect the data signal integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The voltage stabilization module performs preliminary anti-action by pre-suppressing the voltage ripple at the pre-charging node before the clock signal transition can cause erroneous turning-on of buffering transistors. The stabilization transistor is configured to counteract the parasitic capacitance effect in advance, preventing data signal errors before they occur.

Inventive Principle:
Principle #9Preliminary anti-action

2Power

If the TFT size is increased to handle higher resolution, then the driving current capability is improved, but the parasitic capacitance causes premature turning-on of buffering TFTs

Engineering Contradiction:
Improvedriving current capabilityVSAvoidbuffering TFT switching accuracy
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The voltage stabilization module serves as an intermediary that isolates the buffering TFTs from the harmful effects of parasitic capacitance. The stabilization transistor monitors and suppresses voltage fluctuations at the pre-charging node, preventing premature turning-on of buffering TFTs while allowing the main TFTs to maintain their large size for high driving capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If external ICs are replaced by integrated GOA circuit, then production cost is reduced, but signal stability becomes more difficult to control

Engineering Contradiction:
Improveproduction costVSAvoidsignal stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the electrical parameters of the GOA circuit by introducing the voltage stabilization module with specifically designed transistor characteristics. The stabilization transistor is configured with appropriate threshold voltage and transconductance parameters to suppress ripples while maintaining compatibility with the standard TFT manufacturing process, thus achieving both cost reduction and signal stability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11404006B2GOA circuit and display panel
Publication Date: 2022.08.02 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US11404006B2 patent drawing
  • US11404006B2 patent drawing
  • US11404006B2 patent drawing

AI summary

A gate driver of array (GOA) circuit and a display panel are disclosed and include a plurality of cascaded GOA units including a node and a pull-up control module, a pull-up module, a transfer-down module, a pull-down module, and a pull-down holding module electrically connected to the node. The pull-up control module pulls up a potential of the node. Under control of which, the pull-up module and the transfer-down module output an output signal and a stage-transfer signal, respectively. The pull-down module pulls the node and the stage-transfer signal down to a low potential. The pull-down holding module maintains the node and the stage-transfer signal at the low potential. The pull-up control module includes a voltage-stabilization module electrically connected to and dividing a voltage of, the node. Thus, ripples at pre-charging points and output signals in the GOA circuit can be reduced.