Gold-to-Gold Interconnects for Microdevice Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing microelectronic device packaging technologies face challenges in reducing the size of high-performance devices due to large bond-pads and the limitations of gold stud bumps in forming high-density arrays on organic substrates, as they require precise alignment and uniformity, which is difficult to achieve without damaging the dies.
Innovation Solution
The use of gold-to-gold interconnects formed by attaching gold bumps on both the substrate and the die, with the bumps being connected at interfaces to create direct interconnects without the need for a redistribution layer, allowing for better alignment and reduced damage during attachment, enabling the use of gold interconnects in a wider range of applications, including those with organic substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If gold stud bumps are used to form interconnects on organic substrates, then manufacturing cost and environmental safety are improved, but manufacturing precision and alignment uniformity deteriorate due to the difficulty of achieving precise alignment without damaging dies
Solution Approach 1:
The interconnect structure is segmented into multiple components: a first conductive element attached to the substrate, a second conductive element attached to the die, and an optional third conductive element forming a multi-bump interconnect. This segmentation allows each element to be optimized independently, with the substrate element providing alignment tolerance and the die element providing precise electrical connection, thereby resolving the contradiction between ease of manufacture and manufacturing precision.
Solution Approach 2:
The first conductive element on the substrate acts as an intermediary that accommodates alignment non-uniformities. By providing a compliant or adjustable intermediate structure, the system can tolerate misalignment between the die and substrate while still achieving reliable electrical connections, thus enabling gold-to-gold interconnects on organic substrates without requiring extreme manufacturing precision.
2Area of stationary object
If the die is attached directly to the substrate with gold stud bumps, then device footprint is reduced, but the risk of die damage during attachment increases due to the need for precise alignment
Solution Approach 1:
The first conductive element on the substrate serves as a cushioning element that absorbs alignment errors and mechanical stress before the die attachment process. This pre-positioned intermediate structure protects the die from damage by providing a compliant interface that compensates for misalignment, thereby maintaining both small footprint and high reliability.
3Reliability
If solder-based interconnects are used, then reliable electrical connections are achieved, but hazardous materials and high reflow temperatures are required
Solution Approach 1:
The patent replaces expensive and hazardous solder materials with gold conductive elements. While gold is expensive, it eliminates the need for hazardous fluxes and high-temperature reflow processes. The multi-bump structure compensates for any potential gold interconnect weaknesses, providing reliable connections without the harmful factors associated with soldering.
Solution Approach 2:
The invention changes the material parameter from solder to gold, and modifies the interconnect structure from single bump to multi-bump configuration. This parameter change allows the system to achieve reliable electrical connections through diffusion bonding or other low-temperature joining methods, avoiding the high temperatures and hazardous materials required by traditional soldering processes.
4Area of stationary object
If the bond-pads are made smaller to reduce footprint, then device size is reduced, but the density of interconnects must be increased
Solution Approach 1:
The patent transitions from a two-dimensional single-bump interconnect to a three-dimensional multi-bump structure. By stacking conductive elements vertically (first, second, and optional third conductive elements), the system increases interconnect density without increasing the horizontal footprint, thereby accommodating smaller bond-pads while maintaining or enhancing connection capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of high-density interconnects that can accommodate non-uniformities and misalignment, enabling the use of gold interconnects in applications previously limited to solder-based solutions, reducing manufacturing costs, and allowing for smaller, more efficient microelectronic device packages.
Implementation Method 1
The first conductive element and the second conductive element form an interconnect by diffusion bonding
Data Source
AI summary
Microdevices and methods for packaging microdevices. One embodiment of a packaged microdevice includes a substrate having a mounting area, contacts in the mounting area, and external connectors electrically coupled to corresponding contacts. The microdevice also includes a die located across from the mounting area and spaced apart from the substrate by a gap. The die has an integrated circuit and pads electrically coupled to the integrated circuit. The microdevice further includes first and second conductive elements in the gap that form interconnects between the contacts of the substrate and corresponding pads of the die. The first conductive elements are electrically connected to contacts on the substrate, and the second conductive elements are electrically coupled to corresponding pads of the die. The first conductive elements are attached to the second conductive elements at corresponding interfaces such that the interconnects connect the contacts of the substrate directly to corresponding pads on the die within the gap.