GPIO Bus Conversion Layout to Reduce Semiconductor Routing Complexity

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Solution Overview

Problem

Conventional semiconductor devices require complex internal line patterns and increased area due to the need for separate input/output lines and multiplexers to control data input/output to pads, leading to inefficiencies.

Innovation Solution

A semiconductor device design that converts communication protocols into specific data forms for transmission via a bus, omitting the need for a multiplexer, thereby reducing internal line pattern complexity and minimizing device area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate input/output lines and multiplexers are used to control data input/output to pads, then data control capability is improved, but internal line pattern complexity increases

Engineering Contradiction:

Improvedata control capabilityVSAvoidinternal line pattern complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the multiplexer component from the system and replaces it with a bus-based data transmission mechanism. The input/output data converter directly converts data between different formats over the bus, eliminating the need for complex multiplexer-based data routing while maintaining the ability to control data input/output to pads.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The bus structure serves multiple functions: it transports data between the processor and input/output data converter, carries control signals, and enables communication with multiple peripheral blocks. This multi-functional bus replaces the need for separate dedicated lines and multiplexers, reducing overall system complexity while maintaining data control capability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate input/output lines and multiplexers are used to control data input/output to pads, then data control capability is improved, but device area increases

Engineering Contradiction:

Improvedata control capabilityVSAvoiddevice area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the functions of separate input/output lines and multiplexers into a unified bus-based data transmission system. The input/output data converter performs protocol conversion and data formatting directly over the bus, combining multiple functions into fewer components and reducing the overall device area while maintaining data control capability.

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If protocol conversion is performed in the input/output data converter, then communication compatibility is improved, but converter complexity increases

Engineering Contradiction:

Improvecommunication compatibilityVSAvoidconverter complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The input/output data converter acts as an intermediary component that performs protocol conversion between different communication protocols. By centralizing the conversion function in a dedicated converter component rather than distributing complexity across multiple components, the patent achieves communication compatibility while managing complexity in a controlled manner.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12499070B2Semiconductor device and electronic device capable of reducing internal line pattern complexity and area and communication method thereof

Publication Date: 2025.12.16 LX SEMICON CO LTD

AI summary

Disclosed herein is a semiconductor device including a processor that processes input data received via a bus and transmits the process input data as output data via the bus; an input/output data converter that receives the output data via the bus, converts the output data into transmit preGPIO data, and transmits the transmit preGPIO data to the bus; and a GPIO input/output unit that receives the transmit preGPIO data via the bus, converts the transmit preGPIO data into transmit GPIO data, and outputs the transmit GPIO data to at least one GPIO pad.