GPIO Expander Virtualizes Pins to Expand Communication Bandwidth
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Solution Overview
Problem
Computer systems with limited GPIO pins face challenges in increasing communication bandwidth and types of communications due to pin constraints, necessitating innovative solutions to expand pin functionality without increasing package cost.
Innovation Solution
The implementation of a bootable CPU architecture that utilizes an IO expander and ACPI register infrastructure to virtualize communications through platform GPIO pads, allowing for increased pin functionality via eSPI virtual wires and multiplexing techniques, enabling communication over native and platform GPIO pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of GPIO pins is increased to enhance communication bandwidth and types, then communication capability is improved, but package cost increases
Solution Approach 1:
The patent implements a GPIO expander device that enables a limited number of physical GPIO pins to serve multiple functions and control additional virtual GPIO pins through software abstraction. This allows the system to achieve enhanced communication capability without adding more physical pins, thereby avoiding increased package cost while maintaining manufacturing simplicity.
Solution Approach 2:
The GPIO expander acts as an intermediary layer between the limited physical GPIO pins and the software layer that requires more GPIO functionality. It provides virtual GPIO pins through software abstraction, allowing applications to access additional GPIO functions without requiring corresponding physical pins, thus resolving the contradiction between communication capability and package cost.
2Productivity
If more GPIO pins are provided, then communication bandwidth increases, but device complexity increases
Solution Approach 1:
The patent transitions from a purely physical dimension of GPIO pins to include a virtual/software dimension. By implementing virtual GPIO pins through software abstraction in the GPIO expander, the system achieves increased communication bandwidth without proportionally increasing physical device complexity, as the additional functionality exists in the software layer rather than requiring additional physical components.
Solution Approach 2:
The GPIO expander device provides multi-functionality by enabling existing physical pins to control multiple virtual pins through software. This approach increases communication bandwidth while avoiding the need for proportional increases in physical device complexity, as one physical pin can serve multiple virtual pin functions through software-based multiplexing.
Data Source
AI summary
Examples described herein relate to communications with a bootable processor. Some examples include allocating memory address space to provide access to communications over general purpose input output (GPIO)-consistent pins, wherein the GPIO-consistent pins comprise pins coupled to the bootable processor and a pin of the pins coupled to the bootable processor receives or transmits communication for multiple platform GPIO pins.