GPIO-to-GPIO Communication on Multi-Node Daisy-Chained Network

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Solution Overview

Problem

The proliferation of electronic components in devices like automobiles leads to excessive wiring, increasing system complexity, weight, and decreasing performance and reliability due to the limitations of existing communication infrastructure.

Innovation Solution

A low-latency, time division multiplexed communication system over a two-wire bus that enables bi-directional synchronous data, clock, and synchronization signals, allowing direct point-to-point connections between nodes and supporting multiple daisy-chained nodes for efficient data transmission and power distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If more electronic components are included in devices, then functionality and performance are improved, but wiring complexity and weight increase

Engineering Contradiction:
ImprovefunctionalityVSAvoidwiring complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple communication functions (data transmission, clock synchronization, power delivery) into a single integrated two-wire bus system. This merging approach allows multiple electronic components to communicate and receive power through shared communication wires, dramatically reducing wiring complexity while supporting increased functionality

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The communication bus is designed as a universal infrastructure that simultaneously handles digital data communication, clock signal distribution, and power delivery to electronic components. This multi-functional approach eliminates the need for separate dedicated wiring for each function, resolving the contradiction between component proliferation and wiring complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If more electronic components are included in devices, then functionality is improved, but system weight increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidsystem weight
Core Design Contradiction:
Adaptability or versatilityVSWeight of stationary object

Solution Approach 1:

By merging power delivery and data communication into a single two-wire bus infrastructure, the system eliminates redundant wiring that would otherwise be required for separate power and signal transmission. This consolidation significantly reduces the total wire mass, thereby decreasing system weight while enabling more components to be integrated

Inventive Principle:
Principle #5Merging (Combining)

3Stability of the object's composition

If existing communication infrastructure is used, then compatibility is maintained, but performance and reliability decrease

Engineering Contradiction:
ImprovecompatibilityVSAvoidsystem reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The system implements periodic clock synchronization signals transmitted through the two-wire bus to maintain timing accuracy across all connected components. This periodic synchronization ensures reliable operation and data integrity while maintaining compatibility with existing electronic components, thereby improving system reliability without sacrificing compatibility

Inventive Principle:
Principle #19Periodic action

4Reliability

If thick and heavy cable bundles are used for communication, then signal transmission quality is improved, but device complexity and weight increase

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidcable bundle complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The communication infrastructure is segmented into a simple two-wire bus topology rather than using complex multi-conductor cable bundles. This segmentation approach achieves reliable signal transmission through differential signaling and protocol-level error checking while dramatically reducing cable bundle complexity and weight

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10872049B2GPIO-to-GPIO communication on a multi-node daisy-chained network
Publication Date: 2020.12.22 ANALOG DEVICES INC
  • US10872049B2 patent drawing
  • US10872049B2 patent drawing
  • US10872049B2 patent drawing

AI summary

Disclosed herein are systems and techniques for general purpose input/output (GPIO)-to-GPIO communication in a multi-node, daisy-chained network. In some embodiments, a transceiver may support GPIO between multiple nodes, without host intervention after initial programming. In some such embodiments, the host may be required only for initial setup of the virtual ports. In some embodiments, GPIO pins can be inputs (which may change virtual ports) or outputs (which may reflect virtual ports). In some embodiments, multiple virtual ports may be mapped to one GPIO output pin (with the values OR'ed together, for example). In some embodiments, multiple GPIO input pins may be mapped to one virtual port. For example, multiple GPIO input pin values may be OR'ed together, even if they come from multiple nodes.