GPIO Configuration Retention for Low-Power Wake-Up Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Retention flip-flops in digital processing systems consume excessive power and are complex, making them unsuitable for all applications, especially in low-power modes where they fail to maintain data availability for General-Purpose Inputs/Outputs (GPIO) during wake-up signals.
Innovation Solution
A processing system with a power management circuit that selectively switches off supply voltages using a storage circuit with latches to maintain configuration data, allowing the system to enter low-power mode without losing data and resume normal operation efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If retention flip-flops are used to maintain configuration data during low-power modes, then data availability is preserved, but power consumption increases and device complexity increases
Solution Approach 1:
The system divides the configuration data storage into two separate circuits: a first circuit (general-purpose input/output controller) that can be switched off during low-power modes, and a second circuit (storage circuit with latches) that remains powered to maintain configuration data. This segmentation allows the system to preserve data availability while reducing overall power consumption by isolating the always-on storage function from the switchable controller.
Solution Approach 2:
A storage circuit with latches acts as an intermediary between the general-purpose input/output controller and the configuration data. The latches buffer the configuration data, allowing the controller to be switched off while the data remains preserved in the intermediate storage circuit. This intermediary structure resolves the contradiction by decoupling the power-consuming controller from the data preservation function.
2Reliability
If retention flip-flops are used to maintain configuration data, then data availability is preserved, but device complexity increases
Solution Approach 1:
The system separates the configuration data storage function into a dedicated storage circuit with latches, distinct from the general-purpose input/output controller. This segmentation simplifies the overall device architecture by assigning specific functions to separate circuits, avoiding the need for complex retention flip-flop structures within the controller itself.
Solution Approach 2:
The storage circuit with latches creates a copy of the configuration data from the general-purpose input/output controller. This copying mechanism preserves the original data while allowing the controller to be switched off, eliminating the need for complex retention flip-flops that would require maintaining state within the controller circuitry.
3Use of energy by moving object
If the first sub-circuit is switched off during low-power modes, then power consumption is reduced, but configuration data is lost
Solution Approach 1:
Before switching off the first sub-circuit (general-purpose input/output controller) during low-power modes, the configuration data is transferred to the second sub-circuit (storage circuit with latches). This preliminary action ensures that the data is preserved in advance, allowing the controller to be powered down without risking data loss.
Solution Approach 2:
The storage circuit with latches serves as an intermediary that receives and holds configuration data before the first sub-circuit is switched off. This intermediary structure enables the controller to be powered down while the data remains safely stored in the second sub-circuit, preventing information loss during low-power modes.
Data Source
AI summary
A processing system comprising a first sub-circuit configured to be powered by a first supply voltage and a second sub-circuit configured to be powered by a second supply voltage. The first sub-circuit comprises a general-purpose input/out register. The second sub-circuit comprises: a storage circuit configured to selectively store configuration data from the general-purpose input/out register; an input/output interface, at least one peripheral and a selection circuits to exchange signals of the peripherals, and the stored configuration data with the input/output interface. A power management circuit is configured to manage a normal operating mode, and a low-power mode during which the configuration data are maintained stored and the first sub-circuit is switched off. The power management circuit activates the low-power mode in response to receiving a command, and resumes the normal operating mode in response to a wake-up event.