GPIO Output Driver Slope Control for Ringing and SSN Reduction

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Solution Overview

Problem

Conventional GPIO circuits face issues with significant ringing in output waveforms due to parasitic inductances and simultaneous switching noise (SSN), which can degrade device reliability and cause logic errors.

Innovation Solution

The proposed GPIO circuit includes output driver transistors with a pre-driver circuit, a pre-driver transistor, and a slow pre-driver (SPD) circuit. The slope control signal configures the pre-driver transistor to control the operation of the output driver transistors in either a normal mode or a slope-controlled mode, reducing overshoots and SSN.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a steeply sloped transient current is output from the GPIO circuit to drive large off-chip capacitive load, then drive power is improved, but significant ringing appears in the output waveform due to parasitic inductances

Engineering Contradiction:
Improvedrive powerVSAvoidringing in output waveform
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by using a pre-driver circuit to prepare and condition the signal before it reaches the main output driver transistor. The pre-driver circuit shapes the gate voltage signal in advance, controlling the turn-on process of the output transistor to avoid direct steep current transitions that cause ringing. This preliminary signal preparation reduces the harmful effects of parasitic inductances while maintaining the ability to drive large capacitive loads.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pre-driver circuit acts as an intermediary between the control signal and the main output driver transistor. It mediates the signal transition by providing a controlled gate voltage that gradually turns on the output transistor, thereby reducing the slope of transient current and minimizing ringing effects caused by parasitic inductances in the package and PCB.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If transient currents are simultaneously output from multiple GPIO circuits over a short time interval, then productivity is improved, but voltage fluctuations known as simultaneous switching noise are introduced

Engineering Contradiction:
Improvesimultaneous output capabilityVSAvoidsimultaneous switching noise
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The pre-driver circuit performs preliminary action by controlling the timing and shape of gate voltage signals for output driver transistors. When multiple GPIO circuits need to output simultaneously, the pre-driver circuits shape the signals to reduce peak current slopes and stagger the actual current transitions, thereby reducing simultaneous switching noise while maintaining high productivity for driving large capacitive loads.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If conventional pre-driver circuits are used to control output driver transistors, then device complexity is kept low, but significant ringing and voltage fluctuations occur

Engineering Contradiction:
Improvecircuit structureVSAvoidringing and voltage fluctuations
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a pre-driver circuit as an intermediary stage between the control signal and the output driver transistor. This additional circuit element mediates the signal transition by providing controlled gate voltage that shapes the current waveform, reducing ringing and voltage fluctuations. While this increases device complexity slightly, it significantly improves signal quality and reduces harmful effects of parasitic inductances.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250125805A1GPIO circuit and chip
Publication Date: 2025.04.17 GIGADEVICE SEMICON (BEIJING) INC
  • US20250125805A1 patent drawing
  • US20250125805A1 patent drawing
  • US20250125805A1 patent drawing

AI summary

A GPIO circuit and a chip are provided. The GPIO circuit includes at least one output driver branch each including output driver transistor. A gate of the output driver transistor is coupled to a respective pre-driver circuit including a conventional pre-driver circuit, a pre-driver transistor and a slow pre-driver (SPD) circuit. An output of the conventional pre-driver circuit is coupled to the gate of the output driver transistor, and a gate of the pre-driver transistor is coupled to a slope control signal. A drain of the pre-driver transistor is coupled to one terminal of the conventional pre-driver circuit. The SPD circuit is coupled between a source and the drain of the pre-driver transistor. In order to output a signal, the SPD circuit is turned on, and the conventional pre-driver circuit is turned on under the control of the signal to be output.