GPPMOS ESD Protection Circuit Voltage Discrimination
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Solution Overview
Problem
Existing semiconductor integrated circuit devices face challenges in accurately discriminating between test voltage and electrostatic voltage, leading to inadequate electrostatic discharge (ESD) protection, particularly when a high voltage is applied to test pads, and require a correctable structure for controlling trigger and holding voltages.
Innovation Solution
Incorporating a semiconductor integrated circuit device with a first voltage protection circuit using a gate positive p-channel metal oxide semiconductor (GPPMOS) transistor connected to a pad and a second voltage protection circuit comprising serially connected GPPMOS transistors between the first circuit and a ground terminal, which includes a p-type semiconductor substrate, n-wells, gates, source, and drain with high concentration p-type impurities, allowing for effective ESD protection by accurately managing trigger and holding voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ESD protection circuit is installed between the test pad and the test circuit, then electrostatic discharge protection is improved, but the circuit cannot accurately discriminate test voltage from electrostatic voltage
Solution Approach 1:
The patent applies parameter changes by carefully selecting and adjusting the trigger voltage and holding voltage parameters of the ESD protection circuit. The trigger voltage is set higher than normal high voltage but lower than electrostatic voltage, while the holding voltage is set higher than normal high voltage. This parameter configuration enables the circuit to accurately discriminate between test voltage and electrostatic voltage, resolving the contradiction between protection capability and discrimination accuracy.
2Measurement precision
If the trigger voltage of the ESD protection circuit is set higher than normal high voltage and lower than electrostatic voltage, then voltage discrimination is improved, but the circuit structure becomes more complex
Solution Approach 1:
The patent segments the ESD protection function into two distinct circuits: a first ESD protection circuit connected to the test pad with a first trigger voltage, and a second ESD protection circuit connected between the first circuit and the test circuit with a second trigger voltage. This segmentation allows each circuit to be optimized for specific voltage ranges, improving overall discrimination accuracy while maintaining manageable complexity through functional division.
3Ease of manufacture
If a correctable structure is provided for controlling trigger voltage, then ease of manufacture is improved, but the device complexity increases
Solution Approach 1:
The patent implements self-service by designing the ESD protection circuit with inherent voltage discrimination capabilities through its structural configuration. The circuit automatically distinguishes between test voltage and electrostatic voltage based on the predetermined trigger and holding voltage thresholds, eliminating the need for external control mechanisms or additional adjustment components. This self-service approach simplifies manufacturing while maintaining the necessary complexity for accurate voltage discrimination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables precise control of ESD protection by ensuring the ESD protection circuit is turned-off during normal voltage application and turned-on for voltages above and below the normal range, effectively discharging electrostatic charges while minimizing latch-up and improving area efficiency compared to traditional diodes.
Implementation Method 1
the semiconductor integrated circuit device may include a circuit for protecting an electro-static discharge (ESD) between pads for receiving external signals or addresses or between the pads and the internal circuits
Data Source
AI summary
A semiconductor integrated circuit device may include a pad, a first voltage protection circuit and a second voltage protection circuit. The first voltage protection circuit may be connected with the pad. The second voltage protecting circuit may be connected between the first voltage protection circuit and a ground terminal. The first voltage protection circuit may include a gate positive p-channel metal oxide semiconductor (GPPMOS) transistor. The second voltage protection circuit may include serially connected GPPMOS transistors.