GPS Receiver Bit Down-Scaling for Memory Reduction
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Solution Overview
Problem
Conventional GPS receivers require large memory capacity to store correlation integral values, leading to increased memory size and access time, which hinders the reduction of the receiver's size and synchronization acquisition speed.
Innovation Solution
A method and apparatus that down-scale n-bit correlation integral values into m-bit data by selecting upper bits to obtain estimated absolute values, detecting a significant bit, and determining a scale level to reduce the memory storage requirements, allowing for efficient synchronization acquisition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large memory capacity is used to store correlation integral values, then synchronization acquisition performance is maintained, but memory size and access time increase
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the number of bits used to store correlation integral values based on the scale level of the data. Instead of using a fixed large bit width, the system changes the storage parameter (bit width) according to the actual magnitude of correlation values, thereby reducing memory requirements while maintaining acquisition performance.
Solution Approach 2:
The patent implements dynamics by making the memory storage configuration adaptive rather than static. The system dynamically determines the appropriate bit width for storing correlation integral values based on the scale level detected during processing, allowing the memory requirements to flex according to actual operational needs rather than being fixed at a maximum capacity.
2Reliability
If large memory capacity is used to store correlation integral values, then synchronization acquisition performance is maintained, but receiver size increases
Solution Approach 1:
The patent reduces receiver size by changing the storage parameter (bit width) of correlation integral values based on scale level. This dynamic parameter adjustment allows the receiver to use less memory capacity than conventional fixed-size approaches, directly reducing the overall receiver volume while preserving synchronization acquisition capability.
3Measurement precision
If more bits are used to store correlation integral values, then measurement precision is maintained, but memory access time increases
Solution Approach 1:
The patent changes the bit width parameter of correlation integral values based on their scale level. By using fewer bits for smaller values and only reserving additional bits when necessary, the system reduces memory access time while maintaining sufficient precision for accurate synchronization acquisition.
Solution Approach 2:
The patent applies partial action by using only the necessary number of bits for storage rather than always allocating maximum bit width. This partial storage approach reduces memory access time while maintaining adequate precision, avoiding the excessive action of always using full-bit width storage.
Data Source
AI summary
The n-to-m bit down-scaling correlates a plurality of n-bit correlation integral values into a plurality of m-bit data (n>m). The n-bit correlation integral values are obtained by correlating global positioning system (GPS) signals with a plurality of expected codes. Upper (n−m+1) bits are selected from the n-bit correlation integral values, and (n−m+1)-bit estimated absolute values are obtained. A significant bit of a maximum value of the upper (n−m+1) bits of the estimated absolute values is selected. A scale level is obtained based on the significant bit of the maximum value. The n-bit correlation integral values are down-scaled into the m-bit data based on the scale level. The amount of n-bit correlation integral values is reduced into m-bit correlation integral values by the down-scaling method, and thereby reducing a size of the memory for storing the correlation integral values.