GPU Bus Interface BACO Reset Virtual Function Visibility
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Solution Overview
Problem
Conventional GPU reset operations fail to fully restore the GPU to a stable, clean state, leading to unstable intermediate states and loss of virtual functions, as they power down components accessing virtual functions, requiring significant time to save and restore state information.
Innovation Solution
Implementing a bus-alive, core-off (BACO) reset that maintains power to the bus interface while interrupting power to the GPU core, allowing the bus interface to respond to requests using stored state information and resume operations once the GPU is reinitialized.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional GPU reset operations power down all components including the bus interface, then the GPU returns to a clean state, but the virtual functions become invisible on the bus and require significant time to restore
Solution Approach 1:
The GPU system is segmented into two independent power domains: the GPU core (compute units, memory) and the bus interface (PCIe interface, virtual function state machine). This segmentation allows selective power management where the core can be powered down for reset while the bus interface remains powered to maintain virtual function visibility and handle bus transactions during the reset process.
Solution Approach 2:
The bus interface is designed to preliminarily maintain virtual function state information in a persistent state before, during, and after GPU core reset. This preliminary preservation of state information ensures that virtual functions remain visible and accessible on the bus without requiring time-consuming restoration operations after the reset completes.
2Stability of the object's composition
If conventional reset operations power down the entire GPU, then intermediate unstable states are cleared, but virtual functions are lost and require state saving and restoration
Solution Approach 1:
The system separates volatile state (stored in GPU core memory, cleared during reset) from persistent state (stored in bus interface memory, maintained during reset). This segmentation allows the GPU core to be fully reset for stability while the bus interface preserves virtual function state information to prevent data loss.
Solution Approach 2:
The bus interface acts as an intermediary that maintains virtual function state information during GPU core reset. It receives and processes bus transactions related to virtual functions even when the GPU core is powered down, serving as a mediator between the external bus and the resetting core, ensuring continuous state information availability.
3Ease of operation
If the bus interface remains powered during GPU core reset, then virtual functions remain visible and accessible, but the GPU core may enter unstable intermediate states
Solution Approach 1:
The independent power domains allow the bus interface to remain operational while the GPU core is reset, enabling virtual function accessibility without compromising core stability. The segmentation ensures that bus transactions are handled by the stable, powered interface while the unstable core reset process occurs independently.
Solution Approach 2:
The bus interface monitors the GPU core reset state and provides feedback control for handling transactions. During core reset, the interface detects the reset condition and adjusts its behavior accordingly (e.g., forwarding transactions, maintaining state), ensuring stable operation despite core instability.
Data Source
AI summary
A processing unit includes a processor core that implements a physical function that supports multiple virtual functions. The processing unit includes a bus interface that supports communication between an external bus and the physical and virtual functions implemented using the processor core. During a reset of the processing unit, power is interrupted to the processor core power to the bus interface is maintained. The bus interface responds to requests for the physical and virtual functions received over the external bus concurrently with the power interruption. The bus interface responds based on state information associated with the virtual function. Power is restored to the processor core in response to the reinitialization of the GPU. The bus interface stops responding to requests for the physical and virtual functions received over the bus interface in response to restoring the power to the processor core and forwards requests received over the external bus from the bus interface to the processor core.