GPU Cache Compression Interoperability

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Solution Overview

Problem

Graphics processing units (GPUs) face significant energy and latency costs due to memory bus transactions, necessitating efficient data compression techniques to reduce memory bus bandwidth and increase storage efficiency.

Innovation Solution

Implementing adaptive and dynamic compression within the GPU pipeline, combined with enhanced data caching, to minimize off-chip memory access and optimize data transmission bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If compression algorithms are implemented in the GPU pipeline, then storage efficiency and memory bus bandwidth utilization are improved, but device complexity and computational overhead increase

Engineering Contradiction:
Improvememory bus bandwidthVSAvoidcompression logic complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The compression system is divided into separate functional modules: compression logic (252) that compresses data before cache storage, cache memory (254) that stores both compressed and uncompressed data, and decompression logic (256) that decompresses data when accessed. This segmentation allows each component to be optimized independently and enables the system to handle compression without requiring complete redesign of the entire cache subsystem.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cache memory is designed to dynamically store data in different formats (compressed or uncompressed) based on compressibility characteristics. The system can adaptively choose to store some data compressed while leaving other data uncompressed, and can switch between compressed and uncompressed formats as needed. This dynamic approach allows the system to optimize for both storage efficiency and access speed depending on the specific data being cached.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If compression algorithms are applied to cache data, then power consumption is reduced due to decreased memory bus transactions, but additional computational cycles are required for compression and decompression operations

Engineering Contradiction:
Improvepower consumptionVSAvoidcomputational cycle time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

Data is compressed in advance (before being stored in cache) rather than compressing it at the moment of access. The compression logic (252) performs compression operations proactively when data is being written to the cache, so that when the data is later read from cache, it is already in compressed form and ready for efficient transmission over the memory bus. This preliminary compression reduces the urgency and frequency of compression operations during critical access paths.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cache system performs compression and decompression operations autonomously without requiring external intervention. The compression logic (252) automatically compresses data being written to cache, and the decompression logic (256) automatically decompresses data when accessed, if needed. This self-service capability eliminates the need for additional CPU involvement in compression operations, allowing the GPU to manage its own data format transformations efficiently.

Inventive Principle:
Principle #25Self-service

3Quantity of substance

If data is stored in compressed format in cache, then storage efficiency increases, but data access speed may be affected due to decompression requirements

Engineering Contradiction:
Improvestorage efficiencyVSAvoiddata access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

Different portions of the cache memory are allowed to store data in different formats (compressed or uncompressed) based on the local characteristics of the data being cached. The system can selectively compress some cache lines while leaving others uncompressed, depending on their compressibility and access patterns. This local quality approach ensures that highly compressible data benefits from space savings while less compressible or frequently accessed data remains in uncompressed form for faster access.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The cache memory dynamically adapts its storage format based on data characteristics and access patterns. Data can be stored in compressed format when space efficiency is prioritized, and switched to uncompressed format when access speed is prioritized. The system can transition between compressed and uncompressed states as needed, allowing optimal performance for different workloads and data types without being locked into a single storage mode.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10719447B2Cache and compression interoperability in a graphics processor pipeline
Publication Date: 2020.07.21 INTEL CORP
  • US10719447B2 patent drawing
  • US10719447B2 patent drawing
  • US10719447B2 patent drawing

AI summary

Described herein are several embodiments which provide for enhanced data caching in combination with adaptive and dynamic compression to increase the storage efficiency and reduce the transmission bandwidth of data during input and output from a GPU. The techniques described herein can reduce the need to access off-chip memory, resulting in improved performance and reduced power for GPU operations. One embodiment provides for a graphics processing apparatus comprising a shader engine; one or more cache memories; cache control logic to control at least one of the one or more cache memories; and a codec unit coupled with the one or more cache memories, the codec unit configurable to perform lossless compression of read-only surface data upon storage to or eviction from the one or more cache memories.