GPU Card Multiple PCIe Interfaces Data Throughput

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Solution Overview

Problem

Conventional graphics processing unit (GPU) cards have limited input and output capabilities due to the presence of only one PCIe interface, which restricts the full utilization of the processing capability of the main chip when applied to physical-layer computation.

Innovation Solution

The GPU card is equipped with multiple PCIe interfaces, allowing for flexible connection configurations, including direct insertion and signal cables, to enhance data transmission capabilities and match the processing capability of the main chip, with a central processing unit determining the number of enabled interfaces based on processing scenarios and throughput requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If only one PCIe interface is used in the GPU card, then the device complexity is reduced, but the input and output capabilities become insufficient to match the processing capability of the main chip

Engineering Contradiction:
Improvenumber of PCIe interfacesVSAvoidinput and output capabilities
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the single PCIe interface into multiple PCIe interfaces (first PCIe interface and second PCIe interface) on the GPU card. This segmentation allows parallel data transmission channels to be established, thereby improving input and output capabilities to match the main chip's processing capability without significantly increasing device complexity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple PCIe interfaces are added to the GPU card, then the input and output capabilities are improved, but the device complexity increases

Engineering Contradiction:
Improveinput and output capabilitiesVSAvoidnumber of PCIe interfaces
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic configuration of PCIe interfaces through a configuration module that can enable or disable the second PCIe interface based on processing scenarios and throughput requirements. This dynamic approach allows the system to optimize between productivity and device complexity by activating multiple interfaces only when high throughput is needed, rather than having them permanently active.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the main chip processing capability is fully utilized, then the productivity is improved, but the single PCIe interface becomes a bottleneck limiting data transmission speed

Engineering Contradiction:
Improvemain chip utilizationVSAvoiddata transmission speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent segments the data transmission path by providing multiple PCIe interfaces (first and second PCIe interfaces) that can operate in parallel. This allows data to be transmitted through multiple channels simultaneously, removing the single-interface bottleneck and enabling the main chip's processing capability to be fully utilized without being constrained by data transmission speed limits.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3188117B1Electronic device and graphics processing unit card
Publication Date: 2022.09.14 HUAWEI TECH CO LTD
  • EP3188117B1 patent drawingFigure 1
  • EP3188117B1 patent drawingFigure 2
  • EP3188117B1 patent drawingFigure 3

AI summary

Embodiments of the present invention disclose an electronic device and a graphics processing unit card, which can improve data input and output capabilities. The electronic device includes a graphics processing unit card and a mainboard. The graphics processing unit card includes a main chip and M first PCIe interfaces electrically connected to the main chip, where M is an integer greater than or equal to 2. The mainboard includes a processing unit and M second PCIe interfaces connected to the processing unit, and the M second PCIe interfaces are respectively connected to the M first PCIe interfaces.