GPU Clique Detection via Segmented Processing Elements
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Solution Overview
Problem
Current methods for searching graphs to identify cliques, such as the Bron-Kerbosch algorithm, face limitations in scalability and efficiency due to irregular memory access and limited SIMD parallelism, which do not align well with GPU architecture, especially when dealing with large datasets.
Innovation Solution
A method utilizing a set of processing elements (PEs) that generate and process data structures for vertices, allowing efficient adjacency list processing and clique identification, with features like ring buffers and asynchronous operation, optimized for platforms like GPUs, FPGAs, and ASICs, to reduce random memory access and enhance parallel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Bron-Kerbosch algorithm is used for clique identification, then the algorithm can find all maximal cliques in a graph, but it exhibits irregular memory access and limited SIMD parallelism which creates a mismatch with GPU architecture
Solution Approach 1:
The algorithm is divided into multiple independent processing elements (PEs) that can operate in parallel. Each PE handles a portion of the graph processing, allowing the algorithm to be distributed across multiple GPU cores simultaneously, thereby improving productivity on GPU architecture while maintaining the ability to find all maximal cliques
Solution Approach 2:
The algorithm transforms the traditional recursive Bron-Kerbosch approach into an iterative data-parallel formulation. By changing the execution model from sequential recursion to parallel iteration with explicit state management, the algorithm achieves regular memory access patterns and full SIMD utilization on GPU architectures
2Adaptability or versatility
If a standard processor environment is used for graph analysis, then the Bron-Kerbosch algorithm can be implemented, but random access to main memory limits optimization attempts
Solution Approach 1:
The algorithm moves from a single-processor sequential execution model to a multi-dimensional parallel processing model using GPU architecture. By utilizing the massive parallelism and hierarchical memory structure of GPUs, the algorithm achieves both implementation flexibility and high processing efficiency through regular memory access patterns
3Reliability
If MapReduce cluster is used for scaling up Big Data analytics performance, then scalability and fault tolerance are achieved, but raw performance for service analytics applications is limited compared to application-specific data access schemes
Solution Approach 1:
The patent introduces a specialized GPU-based processing layer as an intermediary between the data storage system and the analytics application. This intermediary provides application-specific optimized data access schemes that achieve high raw performance while the underlying MapReduce cluster continues to provide scalability and fault tolerance
Data Source
AI summary
A method is provided for searching a graph to identify cliques using a set of processing elements (PEs), a first PE of the set of PEs having access to an adjacency list of a seed vertex of the graph, the adjacency list of the seed vertex including a set of vertices. The method includes: generating a data structure for each intermediate vertex of the set of vertices, the data structure indicating the respective intermediate vertex and an additional list of intermediate vertices of the set of vertices; storing the generated data structures; for each buffered data structure, receiving the buffered data structure and configuring the available PE to receive an adjacency list of the intermediate vertex indicated in the respective data structure and to select from the adjacency list a set of further vertices that are adjacent to the seed vertex and are part of the additional list.