GPU Thermal Management via Clock Signal Segmentation

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Solution Overview

Problem

Conventional thermal management techniques for electronic devices, particularly graphics processing units (GPUs), often result in screen glitches due to the reduction of CPU speed, which is insufficient to handle complex graphics rendering, leading to hazardous temperature levels and reduced operational efficiency.

Innovation Solution

A GPU with integrated thermal management capabilities, including a display controller, microprocessing engine, and a clock circuit with a multiplexer and divider, selectively provides a raw or divided clock signal to the microprocessing engine, allowing independent timing and reduced power consumption to prevent glitches while maintaining display performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the microprocessor enters low power modes to reduce heat generation, then power consumption is reduced, but screen glitches occur because the processor is not executing instructions

Engineering Contradiction:
Improvepower consumptionVSAvoidscreen display stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system separates the clock signal paths for the microprocessor and display controller. The microprocessor receives a divided clock signal that can be reduced or stopped during low power modes, while the display controller receives the full raw clock signal to maintain continuous operation and prevent screen glitches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A clock divider circuit is introduced as an intermediary between the raw clock signal source and the microprocessor. This divider allows the system to provide different clock frequencies to different components, enabling the microprocessor to enter low power states while the display controller maintains full operational speed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If thermal management techniques are implemented to control heat, then temperature levels are controlled, but graphics rendering performance is hindered

Engineering Contradiction:
Improvethermal levelsVSAvoidgraphics rendering ability
Core Design Contradiction:
TemperatureVSProductivity

Solution Approach 1:

The system applies different operational characteristics to different components: the microprocessor can be slowed down or put into low power modes for thermal management, while the display controller maintains full speed to ensure continuous graphics rendering capability. This localized differentiation allows thermal control without sacrificing overall graphics performance.

Inventive Principle:
Principle #3Local quality

3Loss of energy

If the processor executes instructions at reduced rate for power savings, then energy efficiency is improved, but display synchronization is disrupted causing glitches

Engineering Contradiction:
Improveenergy efficiencyVSAvoiddisplay synchronization
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The clock distribution system is segmented into separate paths: one path provides the divided/reduced clock signal to the microprocessor for energy efficiency, while another path provides the full-speed raw clock signal to the display controller to maintain display synchronization and prevent glitches.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8525840B2Thermal management of graphics processing units
Publication Date: 2013.09.03 APPLE INC
  • US8525840B2 patent drawing
  • US8525840B2 patent drawing
  • US8525840B2 patent drawing

AI summary

Some embodiments include a graphics processing with thermal management capabilities. The graphics processing unit may include a display controller, a microprocessing engine coupled to the display controller, and a clock circuit coupled to the display controller and the microprocessing engine. The clock circuit may further include a raw clock signal coupled to the display controller, a divider coupled to the raw clock signal, and a multiplexer coupled to the divider. The divider may generate a divided version of the raw clock signal, which may be coupled to the multiplexer along with the raw clock signal. The multiplexer may selectively provide the raw clock signal and/or the divided version of the clock signal to the microprocessing engine such that the microprocessing engine may receive a timing signal that is independent of operations of the graphics processing unit and result in fewer glitches.