GPU Code Compilation via CPU Emulation for Debugging

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Solution Overview

Problem

Current GPUs lack adequate debugger support for debugging and executing code, leading to inefficient development of programs for general-purpose computation, with hardware simulators being bulky and inaccessible.

Innovation Solution

A system and method for compiling code to execute on a central processing unit (CPU) that includes translating and compiling code for execution on a GPU, enabling the use of native debuggers and emulating the execution model of the GPU, allowing for efficient debugging and execution on a host processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If code is compiled and executed on a GPU, then execution speed and productivity are improved, but debugger support and ease of operation deteriorate

Engineering Contradiction:

Improveexecution speedVSAvoiddebugger support

Core Design Contradiction:

ProductivityVSEase of operation

Solution Approach 1:

The patent introduces a debugger translation layer that acts as an intermediary between native debuggers and GPU code. This translation layer intercepts debugger operations and translates them into appropriate GPU-specific commands, enabling standard debuggers to work with GPU code without requiring specialized GPU debugger hardware or software.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a software-based copy of debugger functionality that runs on the host processor alongside GPU execution. This software debugger copy emulates the behavior of native GPU debuggers, allowing developers to use familiar debugging tools while maintaining GPU acceleration for actual computation.

Inventive Principle:

Principle #26Copying

2Reliability

If hardware simulators are used to provide debugger support, then reliability is improved, but device complexity and ease of operation worsen

Engineering Contradiction:

Improvedebugger support reliabilityVSAvoidhardware simulator complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces complex hardware simulator systems with a software-based debugging solution that runs on the host processor. This software approach eliminates the need for bulky hardware simulators while maintaining reliable debugging capabilities through virtualization and software emulation of GPU execution contexts.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent creates a universal debugging interface that works across different GPU architectures and programming models. The translation layer is designed to be architecture-agnostic, allowing the same debugger infrastructure to support multiple GPU types without requiring architecture-specific hardware simulators.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If native GPU debuggers are developed, then adapter support is improved, but device complexity and development time increase

Engineering Contradiction:

ImproveGPU debugger compatibilityVSAvoiddebugger functionality complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Instead of developing complex native debuggers for each GPU architecture, the patent inverts the approach by making standard host debuggers work with GPU code through translation. Rather than adapting GPU code to fit specialized debugger hardware, the solution adapts the debugger interface to work with standard GPU execution models.

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS8261234B1System, method, and computer program product for compiling code adapted to execute utilizing a first processor, for executing the code utilizing a second processor

Publication Date: 2012.09.04 NVIDIA CORP

AI summary

A system, method, and computer program product are provided for compiling code adapted to execute utilizing a first processor, for executing the code utilizing a second processor. In operation, code adapted to execute utilizing a first processor is identified. Additionally, the code is compiled for executing the code utilizing a second processor that is different from the first processor and includes a central processing unit. Further, the code is executed utilizing the second processor.