GPU Command Processor Direct Network Message Handling

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Solution Overview

Problem

Current GPU networking applications incur performance reduction due to the need for a host CPU to pre-register or initiate network messages on behalf of the GPU, resulting in back-to-back round trips and delays in computations.

Innovation Solution

A system where a parallel processor, such as a GPU, generates and processes network messages independently using a command processor that communicates directly with a network interface unit, eliminating the need for host involvement by storing messages in a cache and using RDMA for direct networking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the host CPU generates network messages on behalf of the GPU, then network communication can be initiated, but performance is reduced due to back-to-back round trips and computation delays

Engineering Contradiction:
Improvenetwork communication efficiencyVSAvoidcomputation delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The GPU is empowered to generate and send network messages independently through its integrated command processor, eliminating the need for host CPU intervention. The command processor detects network message indications in cache, retrieves messages, and transmits them directly to the network interface, allowing the GPU to serve its own networking needs without external assistance.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The network message generation and transmission functions are extracted from the host CPU and transferred to the GPU's command processor. This separation allows the CPU to focus on computation while the GPU handles its own networking, removing the CPU as a bottleneck in the communication path.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If the host CPU pre-registers network messages for the GPU, then network communication is enabled, but multiple round trips between GPU and host increase latency

Engineering Contradiction:
Improvenetwork communication capabilityVSAvoidround trip latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The GPU independently manages network message registration and transmission through its command processor, eliminating the need for host CPU pre-registration. The command processor monitors cache for network message indications and handles transmission autonomously, reducing communication overhead and latency.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The command processor acts as an intermediary between the GPU compute units and the network interface. It receives network message indications from compute units, retrieves messages from cache, and transmits them to the network interface, serving as a local mediator that eliminates the need for distant host CPU intervention.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the GPU uses an integrated command processor to generate network messages independently, then performance is improved by eliminating round trips, but device complexity increases

Engineering Contradiction:
Improvenetwork processing performanceVSAvoidGPU architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The command processor is designed to handle multiple functions including kernel execution management, memory operations, and network message generation. By making the command processor multi-functional, the GPU achieves independent networking capability without adding separate dedicated hardware for each function, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The network message generation and transmission functions are merged into the existing command processor architecture. Rather than adding separate networking hardware, the patent integrates networking capabilities into the command processor that already exists for GPU operation, combining multiple functions into a single processing unit.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20230120934A1GPU networking using an integrated command processor
Publication Date: 2023.04.20 ADVANCED MICRO DEVICES INC
  • US20230120934A1 patent drawing
  • US20230120934A1 patent drawing
  • US20230120934A1 patent drawing

AI summary

Systems, apparatuses, and methods for generating network messages on a parallel processor are disclosed. A system includes at least a parallel processor, a general purpose processor, and a network interface unit. The parallel processor includes at least a plurality of compute units, a command processor, and a cache. A thread within a kernel executing on a compute unit of the parallel processor generates a network message and stores the network message and a corresponding indication in the cache. In response to detecting the indication of the network message in the cache, the command processor processes and conveys the network message to the network interface unit without involving the general purpose processor.