GPU Compute Mechanism for Matrix-Vector Transformations

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current parallel graphics data processing systems face limitations in efficiently processing graphics data due to fixed function computational units and the need for increased parallel processing techniques.

Innovation Solution

The implementation of a graphics processing unit (GPU) with a compute mechanism that includes multiple processing units, each comprising different types of execution units, optimized for matrix-vector transformations using a register file or shared local memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fixed function computational units are used in graphics processors, then specific graphics operations can be processed efficiently, but the processor cannot support a wider variety of operations and lacks flexibility

Engineering Contradiction:
Improvegraphics data processing efficiencyVSAvoidsupport for various operations
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent applies universality by replacing fixed function units with general-purpose processing units that can execute multiple types of operations including graphics processing, matrix operations, and other compute tasks. The processing units are designed with general computational capabilities that can be configured through software to handle different workloads, making the graphics processor versatile while maintaining performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If parallel processing techniques are implemented to increase processing capacity, then more graphics data can be processed simultaneously, but the complexity of the processing system increases

Engineering Contradiction:
Improveparallel processing capacityVSAvoidprocessing system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the processing system into multiple independent processing units that can operate in parallel. Each processing unit is a self-contained module with execution units, register files, and memory access capabilities, allowing the system to handle large datasets by distributing work across multiple units while maintaining manageable complexity through modular architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple processing units into a unified architecture where units share common resources such as memory controllers and interconnect structures. This combining approach enables parallel processing capacity while reducing overall system complexity by eliminating redundant components and establishing efficient resource sharing mechanisms across the parallel units.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If multiple types of execution units are implemented in processing units, then flexibility and adaptability improve, but the device complexity increases

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidexecution unit diversity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by implementing different types of execution units (such as matrix execution units, vector execution units, and scalar execution units) within processing units based on the specific computational requirements of different operations. Each execution unit type is optimized for its intended function, allowing the system to achieve flexibility and adaptability by selecting appropriate units for specific tasks while managing complexity through targeted specialization rather than uniform design.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250166115A1Compute optimization mechanism for deep neural networks
Publication Date: 2025.05.22 INTEL CORP
  • US20250166115A1 patent drawing
  • US20250166115A1 patent drawing
  • US20250166115A1 patent drawing

AI summary

Embodiments provide mechanisms to facilitate compute operations for deep neural networks. One embodiment comprises a graphics processing unit comprising one or more multiprocessors, at least one of the one or more multiprocessors including a register file to store a plurality of different types of operands and a plurality of processing cores. The plurality of processing cores includes a first set of processing cores of a first type and a second set of processing cores of a second type. The first set of processing cores are associated with a first memory channel and the second set of processing cores are associated with a second memory channel.