Tile-Based GPU Depth Buffer Subsetting for Bandwidth Reduction

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Solution Overview

Problem

Storing depth values in graphics processing units (GPUs) is bandwidth and time-consuming, particularly in tile-based architectures, as all depth values are typically written to system memory, which is not necessary for post-processing operations.

Innovation Solution

The GPU writes only a subset of depth values, such as less than 10% or even 1%, to system memory by using a shader to selectively retain and write out depth values on a tile-by-tile basis, reducing the number of depth values stored.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all depth values are written to system memory, then complete depth information is preserved for post-processing, but bandwidth consumption and processing time increase significantly

Engineering Contradiction:
Improvedepth information completenessVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts only the necessary subset of depth values from the complete depth buffer and writes only those to system memory. The GPU identifies and retains specific depth values that are actually needed for post-processing operations, discarding unnecessary ones locally, thereby reducing memory bandwidth consumption while maintaining post-processing quality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different quality levels to different parts of the depth buffer. Instead of uniformly storing all depth values with full precision, it selectively preserves depth values at high quality only where needed for post-processing, while allowing other depth values to be discarded or stored at lower quality, optimizing the balance between memory usage and processing effectiveness

Inventive Principle:
Principle #3Local quality

2Reliability

If all depth values are written to system memory, then complete depth information is preserved, but memory bandwidth consumption increases

Engineering Contradiction:
Improvedepth information completenessVSAvoidbandwidth consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts only the necessary subset of depth values from the complete depth buffer and writes only those to system memory. The GPU identifies and retains specific depth values that are actually needed for post-processing operations, discarding unnecessary ones locally, thereby reducing memory bandwidth consumption while maintaining post-processing quality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by writing only a portion (less than all) of the depth values to system memory rather than the complete set. This partial writing approach is sufficient for maintaining post-processing quality while significantly reducing the energy-consuming memory bandwidth transactions

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If a subset of depth values is written to system memory, then bandwidth and processing efficiency improve, but depth information completeness may be reduced

Engineering Contradiction:
Improverendering efficiencyVSAvoiddepth information completeness
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent carefully extracts only the specific depth values that are actually needed for post-processing operations. By identifying and retaining only these necessary values while discarding others, the system avoids information loss in critical areas while eliminating redundant data storage, thus maintaining productivity without sacrificing essential depth information

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs feedback mechanisms where the GPU analyzes which depth values are actually required for post-processing operations and adjusts the selection accordingly. This feedback-driven approach ensures that the subset of stored depth values contains all necessary information for maintaining post-processing quality, preventing information loss while optimizing storage efficiency

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3721416B1Tile-based low-resolution depth storage
Publication Date: 2025.12.31 QUALCOMM INC
  • EP3721416B1 patent drawingFigure 1
  • EP3721416B1 patent drawingFigure 2
  • EP3721416B1 patent drawingFigure 3A~3B

AI summary

Techniques are described for generating, with a graphics processing unit (GPU), depth values for pixels of a tile. The tile is one of a plurality of tiles of a frame. The GPU may store a first number of the depth values for the pixels in a tile memory internal to the GPU. The tile memory is configured to store image content for the tile of the frame. The GPU may write a second number of the depth values stored in the tile memory to a system memory. The second number is less than the first number.