GPU Division via Reciprocal Newton-Raphson Iteration

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Solution Overview

Problem

Existing division algorithms, such as nonrestoring division and Newton-Raphson methods, are inefficient for performing division operations on GPUs due to their slow execution times, especially when dealing with large divisors, as they require iterative processes that are not optimized for graphics processing tasks.

Innovation Solution

A processor is configured to generate an initial approximation of the reciprocal of the divisor in a floating-point format, convert it to a 1·(N−1) fractional fixed point representation, introduce a small bias, and perform Newton-Raphson iterations to achieve a precise reciprocal, which is then multiplied by the dividend to obtain the quotient, optimizing the division operation for GPUs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If nonrestoring division algorithm is used, then division operation can be performed, but execution time is proportional to the length of the divisor making it slow

Engineering Contradiction:
Improvedivision execution speedVSAvoiddivision operation time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent changes the fundamental parameter of the division algorithm from iterative subtraction-based approaches to a multiplication-based approach using reciprocal calculation. By transforming the division operation into a sequence of multiplications and iterations on the reciprocal, the execution time becomes independent of the divisor length, directly resolving the speed-time contradiction.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If Newton-Raphson method is used to generate reciprocal, then division can be converted to multiplication, but iterative process is still not optimized for graphics processing

Engineering Contradiction:
Improvedivision operation efficiencyVSAvoidalgorithm complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the reciprocal calculation process into distinct stages: initial approximation generation, bias introduction, and iterative refinement. This segmentation allows each stage to be optimized independently and enables parallel execution across multiple processing units in the GPU architecture, resolving the productivity-complexity contradiction by making the algorithm structure compatible with parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a preliminary bias to the initial reciprocal approximation before performing the iterative refinement steps. This preliminary action pre-conditiones the data to accelerate convergence of the subsequent iterations, improving productivity while maintaining manageable algorithmic complexity suitable for graphics processing units.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If iterative processes are used for division, then reciprocal can be calculated with precision, but execution time increases especially for large divisors

Engineering Contradiction:
Improvereciprocal precisionVSAvoiditeration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent maintains continuous useful action by structuring the iterative process to perform productive work in each iteration step, refining the reciprocal approximation progressively. The method ensures that each iteration contributes to precision improvement while the overall process is optimized to achieve required precision in minimal iterations, balancing precision and time through efficient use of each computational step.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10146504B2Division using the Newton-Raphson method
Publication Date: 2018.12.04 ADVANCED MICRO DEVICES INC
  • US10146504B2 patent drawing
  • US10146504B2 patent drawing
  • US10146504B2 patent drawing

AI summary

Systems, apparatuses, and methods for performing a division operation are disclosed. In one embodiment, a processor includes at least one arithmetic logic unit and a register file. In response to detecting a request to perform a division operation between a dividend and a divisor, the processor generates an initial approximation of the reciprocal of the divisor. Then, the processor converts the initial approximation of the reciprocal of the divisor into a fractional fixed point representation. The processor also introduces a small error into the initial approximation of the reciprocal of the divisor. Then, the processor implements one or more Newton-Raphson iterations for refining the approximation of the reciprocal and then multiplies the final reciprocal value by the dividend to generate the quotient.