Dynamic GPU Resource Allocation for Load Balancing

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Solution Overview

Problem

Modern graphics processing units (GPUs) face inefficiencies when executing multiple processes due to static allocation of texture processing clusters (TPCs) and memory resources, which restricts load balancing and cannot adapt to changing processing and memory requirements of processes.

Innovation Solution

A dynamic method for allocating execution resources and local memory within a GPU, where subcontexts can dynamically acquire and release TPCs and memory blocks based on load balancing, allowing for flexible and efficient resource allocation across multiple processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If TPCs and memory resources are statically allocated to subcontexts, then resource allocation is simple and predictable, but load balancing is restricted and resource utilization is inefficient

Engineering Contradiction:
Improveresource allocation mechanismVSAvoidresource utilization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements dynamic resource allocation where TPCs are not permanently bound to specific subcontexts but are allocated on-demand based on current workload conditions. The system maintains a pool of TPCs that can be dynamically assigned to any subcontext that needs them, enabling load balancing while preserving allocation simplicity through a centralized management mechanism.

Inventive Principle:
Principle #15Dynamics

2Productivity

If TPCs are dynamically allocated to subcontexts, then load balancing is improved and resource utilization is enhanced, but system complexity increases

Engineering Contradiction:
Improveresource utilization efficiencyVSAvoidresource allocation mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a TPC allocation mechanism that acts as an intermediary between subcontexts and TPCs. This allocation layer manages the dynamic assignment, tracking which TPCs are available and assigning them to subcontexts based on workload conditions, thereby enabling complex dynamic behavior without increasing the complexity of individual subcontext implementations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a process is assigned to specific TPCs, then execution is predictable and isolated, but the process cannot utilize idle TPCs from other processes

Engineering Contradiction:
Improveexecution isolationVSAvoidprocessor utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent makes TPCs universal resources that can serve multiple subcontexts from different processes. Instead of dedicating TPCs to specific processes, any subcontext can allocate and execute on any available TPC, allowing idle TPCs to be utilized by other processes while maintaining execution isolation through virtual address space separation and context switching.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10817338B2Dynamic partitioning of execution resources
Publication Date: 2020.10.27 NVIDIA CORP
  • US10817338B2 patent drawing
  • US10817338B2 patent drawing
  • US10817338B2 patent drawing

AI summary

Embodiments of the present invention set forth techniques for allocating execution resources to groups of threads within a graphics processing unit. A compute work distributor included in the graphics processing unit receives an indication from a process that a first group of threads is to be launched. The compute work distributor determines that a first subcontext associated with the process has at least one processor credit. In some embodiments, CTAs may be launched even when there are no processor credits, if one of the TPCs that was already acquired has sufficient space. The compute work distributor identifies a first processor included in a plurality of processors that has a processing load that is less than or equal to the processor loads associated with all other processors included in the plurality of processors. The compute work distributor launches the first group of threads to execute on the first processor.