Distributed Processing Node Emulator for GPU Testing

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Solution Overview

Problem

Testing the communications capabilities of groups of GPUs in a multi-GPU setup for machine learning applications is challenging and often requires expensive physical computing systems.

Innovation Solution

A distributed processing node emulator is used to emulate a multi-processing node distributed computing system, generating intra- and inter-processing node communications, and executing pre-defined test cases to monitor and report on the system under test, thereby reducing the need for expensive physical hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If physical computing systems are built to test GPU communications capabilities, then testing accuracy is improved, but system cost increases

Engineering Contradiction:
Improvetesting accuracyVSAvoidsystem cost
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent creates a virtual copy of the multi-GPU system using a processing node communications model that replicates the behavior and communication patterns of physical GPUs. This virtual model allows comprehensive testing of communication capabilities without requiring expensive physical hardware, thereby maintaining measurement precision while reducing system cost.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces the mechanical/physical GPU system with a software-based processing node model that simulates GPU communications. By substituting the physical system with a virtual representation, the patent eliminates the need for expensive physical hardware while preserving the ability to accurately test communication capabilities through software-based simulation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If physical computing systems are built to test GPU communications capabilities, then system functionality is improved, but device complexity increases

Engineering Contradiction:
Improvesystem functionalityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a virtual copy of the multi-GPU system using a processing node communications model that replicates the behavior and communication patterns of physical GPUs. This virtual model allows comprehensive testing of communication capabilities without requiring expensive physical hardware, thereby maintaining measurement precision while reducing system cost.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces the mechanical/physical GPU system with a software-based processing node model that simulates GPU communications. By substituting the physical system with a virtual representation, the patent eliminates the need for expensive physical hardware while preserving the ability to accurately test communication capabilities through software-based simulation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11949566B2Methods, systems, and computer readable media for testing a system under test using a processing node communications model
Publication Date: 2024.04.02 KEYSIGHT TECHNOLOGIES INC
  • US11949566B2 patent drawing
  • US11949566B2 patent drawing
  • US11949566B2 patent drawing

AI summary

Methods, systems, and computer readable media for testing a system under test (SUT). An example system includes a distributed processing node emulator configured for emulating a multi-processing node distributed computing system using a processing node communications model and generating intra-processing node communications and inter-processing node communications in the multi-processing node distributed computing system. At least a portion of the inter-processing node communications comprises one or more messages communicated with the SUT by way of a switching fabric. The system includes a test execution manager configured for managing the distributed processing node emulator to execute a pre-defined test case, monitoring the SUT, and outputting a test report based on monitoring the SUT during execution of the pre-defined test case.