GPU Ethernet Switching Layout for Server Interconnect Bandwidth

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Solution Overview

Problem

The low bandwidth of PCIe buses and direct interconnections between GPUs limits data transmission efficiency and can lead to congestion, hindering the effective utilization of multiple GPUs in servers.

Innovation Solution

Implementing Ethernet switching chips integrated on a mezzanine board within a server, connected via a designated connector supporting a standard Ethernet protocol, to establish high-bandwidth Ethernet connections between GPUs, enabling efficient data transmission and reducing congestion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If PCIe buses or direct baseboard interconnections are used to connect multiple GPUs, then GPU computing power and data transmission capability are enhanced, but the bandwidth is limited and congestion occurs

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidbandwidth
Core Design Contradiction:
PowerVSQuantity of substance

Solution Approach 1:

The patent introduces Ethernet switching chips as intermediary devices between GPUs to enable high-bandwidth communication. The Ethernet switches act as mediators that facilitate data transmission between GPUs through standard Ethernet protocols, overcoming the bandwidth limitations of direct PCIe or baseboard connections while maintaining computational power enhancement

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies universal Ethernet protocol standards across different GPU connections, making the interconnection system adaptable and versatile. By using standard Ethernet protocols instead of proprietary PCIe or baseboard interfaces, the system achieves broader compatibility and higher bandwidth capabilities while maintaining ease of deployment and switching between different configurations

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If Ethernet switching chips are integrated on a mezzanine board, then topological flexibility and switching between manufacturers are improved, but the baseboard area is reduced

Engineering Contradiction:
Improvetopological flexibilityVSAvoidbaseboard area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent segments the Ethernet switching chip integration from the main baseboard by placing them on a separate mezzanine board. This segmentation allows the baseboard to maintain its original area while the mezzanine board provides the additional functionality of Ethernet switching chips, achieving both topological flexibility and manufacturer switching capability without compromising baseboard space

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a two-dimensional baseboard layout to a three-dimensional architecture by adding a mezzanine board layer. This dimensional change allows Ethernet switching chips to be integrated without increasing the baseboard footprint, as the mezzanine board provides vertical space for additional components while maintaining baseboard area integrity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250390973A1Method and device for interconnecting gpus of servers, a server, and a storage medium
Publication Date: 2025.12.25 NEW H3C AI TECH CO LTD
  • US20250390973A1 patent drawing
  • US20250390973A1 patent drawing
  • US20250390973A1 patent drawing

AI summary

Disclosed are a graphics processing units (GPUs) interconnection method, device, and a storage medium. The device is applied to a server comprising two or more GPUs interconnected with each other by an Ethernet switching chip to establish Ethernet connections, so that in the server, a source GPU may determine that data needs to be transmitted to a target GPU, encapsulates the data to be transmitted based on a standard Ethernet protocol and obtains an Ethernet packet. The source GPU sends the Ethernet packet to the Ethernet switching chip; then the Ethernet switching chip sends the Ethernet packet to a designated connector. The designated connector sends the Ethernet packet to a destination GPU.