GPU Engine Synchronization via Event Memory
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Solution Overview
Problem
Traditional computer systems lack adequate synchronization mechanisms among parallel engines within a graphics processing unit (GPU), leading to performance bottlenecks, especially in multi-GPU and multi-buffer applications, where engines cannot run fully parallel due to the absence of notification mechanisms, causing the CPU to insert wait-engine-idle commands and hinder efficient task switching.
Innovation Solution
A method and system that utilize event memories to synchronize engines by writing event values corresponding to commands into dedicated memory elements, allowing the CPU to track command execution status, enabling independent command issuance and parallel operation among engines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the CPU inserts wait-engine-idle commands to synchronize engines, then engine execution order is controlled, but command processing speed decreases and engines cannot run fully parallel
Solution Approach 1:
The patent introduces event memory as an intermediary synchronization mechanism between the CPU and GPU engines. Instead of the CPU directly blocking commands, the CPU writes event values to event memory, and engines modify these values upon completion. This intermediary allows engines to operate independently while maintaining synchronization, resolving the contradiction between execution control and processing speed.
Solution Approach 2:
The patent enables engines to self-report their completion status by automatically modifying event memory values when tasks are finished. This self-service mechanism eliminates the need for the CPU to continuously poll or block waiting for engine status, allowing the CPU to issue commands continuously while engines independently track and report their own completion, thus improving productivity while maintaining execution control.
2Reliability
If the CPU continuously checks engine status to maintain synchronization, then engine coordination is ensured, but system efficiency decreases
Solution Approach 1:
The patent implements preliminary action by having the CPU write event values to event memory in advance before engine execution. The engines then autonomously modify these pre-written values upon completion. This eliminates the need for continuous CPU checking, as the synchronization state is already prepared and passively updated, reducing system efficiency loss while maintaining reliable engine coordination.
Solution Approach 2:
The patent establishes a feedback mechanism where engines automatically provide completion status information by modifying event memory values. This feedback is passive and event-driven rather than requiring active CPU polling. The CPU can efficiently query the event memory to determine engine status without continuous checking, maintaining reliable coordination while minimizing energy loss through efficient, event-triggered status acquisition.
3Productivity
If engines operate fully parallel without synchronization, then processing speed increases, but execution order and coordination are lost
Solution Approach 1:
The patent segments the synchronization mechanism into separate event memory regions for different engine pairs. Each event memory element tracks the synchronization status between specific engine combinations. This segmentation allows engines to operate in parallel independently while their completion statuses are separately tracked, enabling both high processing speed and maintained execution order through structured, distributed synchronization tracking.
4Measurement precision
If event memory is frequently read by the CPU to track execution status, then command tracking precision improves, but memory access overhead increases
Solution Approach 1:
The patent maintains continuity of useful action by having engines continuously update event memory values as they complete tasks, rather than requiring the CPU to continuously query for status. The event memory continuously reflects the current execution state through engine-initiated updates. This allows the CPU to efficiently check status at any point without significant overhead, as the information is continuously maintained and immediately available, achieving both precise tracking and minimal access time.
Data Source
AI summary
A method and system are disclosed for synchronizing two or more engines in a graphics processing unit (GPU). When issuing a command to an engine, a central processing unit (CPU) writes an event value representing the command into an element of an event memory associated with the engine. After executing the command, the engine modifies the content of the event memory in order to recognize the completion of the command execution. The CPU acquires the command execution status by reading the modified content of the event memory. With precise knowledge of the command execution status, the CPU can issue commands to various engines independently, hence the engines can run parallel.