GPU Process Exception Location via Hierarchical Task Simulation
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Solution Overview
Problem
Existing technologies struggle to quickly identify the specific command segment causing execution anomalies in GPU processes due to the large number of hardware commands, making it difficult to locate process execution exceptions.
Innovation Solution
A method and device that utilize a command stream parser and process verification model to simulate task execution, divide tasks into levels, and selectively simulate lower-level tasks based on inconsistencies, reducing the number of tasks that need to be analyzed to locate exceptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all tasks in a GPU process are simulated for verification, then execution exceptions can be detected, but the time and computational resources required increase significantly due to the large number of tasks
Solution Approach 1:
The patent segments the task verification process into two distinct phases: a fast execution trace phase that processes all tasks to identify suspicious segments, and a slow simulation phase that only verifies suspicious segments in detail. This segmentation allows the system to maintain high reliability by thoroughly checking problematic areas while avoiding the time cost of simulating all tasks comprehensively.
Solution Approach 2:
The patent applies partial action by performing complete simulation verification only on suspicious task segments identified by the execution trace, rather than verifying all tasks. The execution trace provides a quick overview that flags only the segments needing detailed simulation, thus applying verification effort partially where most needed rather than excessively across all tasks.
2Measurement precision
If comprehensive simulation of all tasks is performed to locate execution exceptions, then accuracy of exception identification improves, but the complexity of the verification process increases
Solution Approach 1:
The verification process is segmented into two complementary components: an execution trace mechanism that quickly identifies suspicious segments, and a simulation mechanism that provides accurate verification of those segments. This segmentation reduces overall process complexity by dividing the workload into a simple filtering stage and a detailed verification stage, rather than requiring one complex all-encompassing verification process.
Solution Approach 2:
The execution trace acts as an intermediary between the task execution and the simulation verification. It processes task execution data to identify suspicious segments, which then become the input for the simulation phase. This intermediary layer simplifies the overall process by pre-filtering tasks, so the simulation mechanism only needs to handle a small subset of tasks rather than all tasks directly.
3Speed
If execution traces are collected and simulated to identify suspicious segments, then the speed of locating exceptions improves, but additional storage resources are required for trace data
Solution Approach 1:
The patent extracts only the essential execution trace information needed for identifying suspicious segments, rather than storing complete task execution data. The execution trace captures key metrics and state changes that enable quick identification of problematic segments, extracting only the necessary data for verification purposes while discarding redundant information that would consume storage resources.
Solution Approach 2:
Instead of storing all task data and filtering it during verification, the patent inverts the approach by generating execution traces that contain only the necessary verification information. The trace data is constructed specifically for verification purposes, storing information in a format that enables quick suspicious segment identification without requiring storage of the original complete task datasets.
Data Source
AI summary
A method for locating a process execution exception includes: inputting task data of a present upper-level task into a process verification model to obtain a task reference feature value and comparing it with an execution feature value corresponding to the present upper-level task, and recording the upper-level task number corresponding to the present upper-level task when the task reference feature value is inconsistent with the execution feature value; when the lower-level task corresponding to the upper-level task is not a bottom-level task, taking the lower-level task as a new upper-level task, and repeating the step of simulation; and selecting, when the lower-level task corresponding to the upper-level task is the bottom-level task, the bottom-level task that needs to be simulated according to the upper-level task number and inputting the task data of the bottom-level task into the process verification model to locate exception execution issues.


