Extended Vertex Cache for GPU Pipeline Bottleneck Reduction

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Solution Overview

Problem

The GPU pipeline faces bottlenecks due to the large amount of data it must process, particularly with primitives that have many attributes, leading to slowed image processing and increased power consumption, as it requires a wide internal data bus and computationally intensive attribute gradient setup.

Innovation Solution

An extended vertex cache is introduced to store attributes for vertices within the image geometry, allowing only vertex coordinates and vertex cache index values to be passed through the pipeline, deferring attribute gradient setup until after primitive rejection, thus reducing data transfer and computational load.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the GPU pipeline passes all vertex attributes through each processing stage, then complete vertex data is available for processing, but data throughput is reduced and processing speed slows down

Engineering Contradiction:
Improvevertex data completenessVSAvoidimage processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts vertex attributes from the main data stream and stores them in a separate vertex cache memory structure. Only essential vertex coordinates are passed through the pipeline, while full attribute data is retrieved from the cache when needed, thereby reducing data transfer volume while maintaining data availability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The vertex cache pre-stores vertex attributes in advance so that they are readily available when needed during pipeline processing. This preliminary storage eliminates the need to transfer complete attribute data through each stage, improving throughput while ensuring data completeness when required.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the GPU pipeline uses a wide internal data bus to move large amounts of vertex data, then data throughput requirements are met, but device complexity and power consumption increase

Engineering Contradiction:
Improvedata throughputVSAvoidinternal data bus width
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent separates vertex attribute storage from the main pipeline data flow, extracting attributes into a dedicated vertex cache. This allows the pipeline to use a narrower data bus for transmitting only essential vertex coordinates, while full attribute data is fetched from the cache on demand, reducing both bus width requirements and overall system complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If attribute gradient setup is performed early in the pipeline, then attribute data is ready for processing, but computational intensity slows down the pipeline

Engineering Contradiction:
Improveattribute data readinessVSAvoidpipeline processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The vertex cache performs attribute gradient setup in advance during vertex processing, storing computed gradients in the cache memory. This preliminary computation ensures attribute data is ready when needed without blocking the main pipeline, as the heavy computational work is done beforehand during vertex shader execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the attribute processing into two phases: vertex-level attribute computation during vertex shader execution, and pixel-level attribute interpolation during the rasterization phase. This segmentation allows computationally intensive gradient setup to be performed independently at different pipeline stages, preventing bottlenecks.

Inventive Principle:
Principle #1Segmentation

4Productivity

If all primitives are processed with full attribute data, then complete processing is performed, but power consumption increases

Engineering Contradiction:
Improveprocessing completenessVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial processing by first performing quick vertex coordinate-based operations to determine primitive visibility and basic geometry. Only after this preliminary filtering do the system retrieve and process full vertex attributes from the cache for primitives that actually need them, avoiding unnecessary computational energy expenditure on invisible or unnecessary primitives.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP2047431B1Graphics processing unit with extended vertex cache
Publication Date: 2018.01.10 QUALCOMM INC
  • EP2047431B1 patent drawingFigure 1
  • EP2047431B1 patent drawingFigure 2
  • EP2047431B1 patent drawingFigure 3

AI summary

Techniques are described for processing computerized images with a graphics processing unit (GPU) using an extended vertex cache. The techniques include creating an extended vertex cache coupled to a GPU pipeline to reduce an amount of data passing through the GPU pipeline. The GPU pipeline receives an image geometry for an image, and stores attributes for vertices within the image geometry in the extended vertex cache. The GPU pipeline only passes vertex coordinates that identify the vertices and vertex cache index values that indicate storage locations of the attributes for each of the vertices in the extended vertex cache to other processing stages along the GPU pipeline. The techniques described herein defer the setup of attribute gradients to just before attribute interpolation in the GPU pipeline. The vertex attributes may be retrieved from the extended vertex cache for attribute gradient setup just before attribute interpolation in the GPU pipeline.